18/03/2010 DPG Bonn – March Session: HK 48 A demonstrator for the CBM Time of Flight wall electronic readout chain Pierre-Alain Loizeau PI – Uni Heidelberg People: GSI: M. Ciobanu, H. Deppe, H. Flemming, J. Frühauf, D. Gonzalez-Diaz, M. Kis, K. Koch, S. Linev, W. F.J. Müller KIP: N. Abel, U. Kebschull, S. Manz PI: N. Herrmann, P.-A. Loizeau, I. Deppner, K. Wisniewski

A demonstrator for the CBM Time of Flight wall electronic readout chain 2/10 18/03/2010 P.-A. Loizeau –DPG Bonn –March 2010 –Session HK Readout chain demonstrator design 1. Main requirements for the electronics Conclusion & Outlook 3. Current components of the demonstrator 4. Clock synchronization 5. First observations on the full chain

A demonstrator for the CBM Time of Flight wall electronic readout chain 3/10 18/03/2010 P.-A. Loizeau –DPG Bonn –March 2010 –Session HK Main requirements for the electronics ~75000 channels Global electronic time resolution < 30ps (TDC < 25ps) Self triggered system (Timestamp & Epoch markers) Compatible readout, synchronization and time domain with other detectors Low power consumption: < 60 mW/ch (~30mW/ch for both Analog and TDC) Rate per electronic channel, Au+Au at 25 AGev, mbias, 10 MHz interaction rate, field scaling = (from a simulation by A. Kiseleva) Information about the conceptual design: see I. Deppner talk in Session HK58

A demonstrator for the CBM Time of Flight wall electronic readout chain 4/10 18/03/2010 P.-A. Loizeau –DPG Bonn –March 2010 –Session HK Readout chain demonstrator design CLOSY2 + Distribution CLK250 CLK156 Sync TDC 156/250 MHz clock & SYNC_TDC distribution some aux dets SYNC message sender RPC Test Bench FOPI RPC Test Environment MBS System A ROC Eth A B SYNC-S AUX Opt R2F (AD1) CLK250 A B C D E F CLK156 G Sync TDC PADIGET4 PADIGET4 PADIGET4 PADIGET4 PADIGET4 PADIGET4 CBM M-RPC Demo 1 Start counter Data readout, Epoch synchronization check, first data aggregation DABC Online/ Offline Analysis GO4 FAIRROOT ABB Opt B PCIe Opt A PC Hybrid DAQ System: triggered + time-stamped Other systems: nXYTER, …

A demonstrator for the CBM Time of Flight wall electronic readout chain 5/10 18/03/2010 P.-A. Loizeau –DPG Bonn –March 2010 –Session HK Components: Front end Analog part: Fast Pre-Amplifier & Discriminator PADI project by M. Ciobanu at GSI-DetLab Performances: resolution <15ps rms Digital part: Free running High Resolution TDC GET4 project at GSI by H. Deppe & H. Flemming from GSI-EE: See first talk of this session Performances: ~25ps rms resolution, data readout >150 kHz/ch possible Clock System: Generate 2 low jitter phase coupled clocks and a synchronization signal for GET4 and ROC CLOSY2 (Cbm-cLOck-SYnthesizer) developed at GSI by K. Koch from GSI –EE

A demonstrator for the CBM Time of Flight wall electronic readout chain 6/10 18/03/2010 P.-A. Loizeau –DPG Bonn –March 2010 –Session HK Components: readout & aggregation ROC: FEB readout, first data processing, synchronization, FEB control SYSCORE v2 based solution Firmware developed at KIP by S. Manz: see previous talk Software environment: DAQ: DABC = Data Acquisition Backbone Core (HK49.1) Data analysis: GO4 = GSI Object Oriented On-line-Offline (HK30.2) Developed by J.Adamczewski-Musch, S.Linev, M.Al- Turany, D.Bertini & H.G.Essel (GSI - EE)

A demonstrator for the CBM Time of Flight wall electronic readout chain 7/10 18/03/ Clocks Synchronization Why so important? 2 free running systems with different clocks in CBM =>Event building! channels  ~19000 TDC chips with current design, with measure of each hit against the received clock! In the CLOSY2 system: Sync signal generated every 5th coincidence Correspond to 25 GET4 Epoch Correspond to 40 NXYTER timestamp cycle P.-A. Loizeau –DPG Bonn –March 2010 –Session HK 48

A demonstrator for the CBM Time of Flight wall electronic readout chain 8/10 18/03/2010 P.-A. Loizeau –DPG Bonn –March 2010 –Session HK First observations on the full chain Assembled for the first time middle of February Using first version of the ROC firmware and an online analysis tool In a first time focus on hardware checks: -2 FEET-TDC & 3 FEET-PADI tested -Presence of all voltages & error messages -Clock system: Synchronization of the epochs between chips and between the 2 clock signals=> every 25 epochs Results: The readout of the chain using current versions of the electronic components and of the FAIR software environment is working 1 FEET-TDC board was operated successfully with all voltages at nominal value and no synchronization error messages

A demonstrator for the CBM Time of Flight wall electronic readout chain 9/10 18/03/2010 P.-A. Loizeau –DPG Bonn –March 2010 –Session HK 48 Conclusion  The full readout chain for the demonstrator of the CBM ToF wall is a project involving 4 different groups, with strong requirement on the time resolution  Each of its components showed performance meeting the requirements during individual tests  This readout chain is now assembled for the first time since a few weeks and tests just started Goals Building & testing a full demonstrator including a differential RPC, with 64 channels (32 strips), until end of 2010 Demonstration of the readout chain performance with different kinds of Multi-Gap Resistive Plate Chambers

A demonstrator for the CBM Time of Flight wall electronic readout chain 10/10 18/03/2010 P.-A. Loizeau –DPG Bonn –March 2010 –Session HK 48 Thank you for your attention

A demonstrator for the CBM Time of Flight wall electronic readout chain 18/03/2010 P.-A. Loizeau –DPG Bonn –March 2010 –Session HK 48

A demonstrator for the CBM Time of Flight wall electronic readout chain 18/03/2010 P.-A. Loizeau –DPG Bonn –March 2010 –Session HK 48 FEET-PADI CAEN v1290A Rising edge VME & MBS Readout System Closy2 CAEN v1290A Falling edge Splitter FEET-PADI VME readout and evaluation system (Pulser) Online/ Offline Analysis GO4 PC

A demonstrator for the CBM Time of Flight wall electronic readout chain 18/03/2010 P.-A. Loizeau –DPG Bonn –March 2010 –Session HK 48 some aux dets RPC Test Bench FOPI RPC Test Environment MBS System START CardTACQUILA HD M-RPC PMT PADITACQUILA + ToT board PADI TACQUILA + ToT board PADI PADI2 VME readout and evaluation system with TACQUILA system (BEAM) PAW PC

A demonstrator for the CBM Time of Flight wall electronic readout chain 18/03/2010 P.-A. Loizeau –DPG Bonn –March 2010 –Session HK 48 CLOSY2 CLK250 CLK156 Sync TDC 156/250 MHz clock & SYNC_TDC distribution A ROC Eth A B SYNC-S AUX Opt AD-1 (R2F) CLK250 A B C D E F CLK156 G Sync TDC FEET - PADI FEET - TDC Pulser RocUtils Online/ Offline Analysis GO4 PC System for the first full chain tests

A demonstrator for the CBM Time of Flight wall electronic readout chain 18/03/2010 P.-A. Loizeau –DPG Bonn –March 2010 –Session HK 48 Minimal Numbers of boards for each electronic layer per SM: FEET-PADIFEET-TDCR2F (AD-1)ROC Central Middle Middle Outer Total number of channels: ~75500! Total ROCs: ~710!

A demonstrator for the CBM Time of Flight wall electronic readout chain 18/03/2010 P.-A. Loizeau –DPG Bonn –March 2010 –Session HK 48