Electro-Chemical Migration Definition Stage Project Wallace Ables - Dell HDP User Group Member Meeting Host: Ericsson Stockholm Sweden May 28, 2013 Presented by: Bob Smith © HDP User Group International, Inc.

© HDP User Group International, Inc. Problem Statement The current industry standard test protocols were originally developed to identify highly ionic contaminant levels (halides) after a cleaning process. These test protocols are not completely effective at identifying ECM and corrosion exposures from no-clean flux residues. © HDP User Group International, Inc.

Background Products assembled with no clean flux systems are experiencing various forms of corrosion and Electro Chemical Migration failures. These products and flux systems have passed the current industry standard cleanliness and corrosion resistance testing, demonstrating that these test procedures are not completely effective. The failure mechanisms occur on products assembled for all segments of the electronics industry. The current industry standard testing does not take into consideration various acceleration factors associated with no clean flux and product design features. © HDP User Group International, Inc

© HDP User Group International, Inc. Project Goal Identify the required enhancements to current industry specifications, test methods, test boards and coupon design to increase detection of ECM and corrosion induced failures when no clean flux systems are used. Areas to investigate: Cleanliness testing Corrosion resistance testing ECM testing Maximum acceptable residue levels Influence of PCB manufacturing defects Influence of PCBA design features © HDP User Group International, Inc.

Not in immediate scope Some closely aligned aspects of this project will be deferred to a follow-on project, or are already being investigated by other project teams. Therefore the following factors will not be in the scope of this project: Conformal coating over no-clean fluxes. This may allow ECM under the conformal coating. Solder mask test standards for ECM controls. ImAg creep corrosion (covered by multiple current projects) © HDP User Group International, Inc

© HDP User Group International, Inc. Project Objectives Identify modification to current industry standard specifications and test methods for cleanliness testing, corrosion resistance testing, and ECM testing to increase detection of failures when no clean flux systems are used. Primary areas of investigation: Characterize failures escaping current test methods Test flux residue levels: SMT, Wave Solder, Rework Test flux application methods: controls, acceptable application levels, measurement methods and test methods Enhance test board and test coupon designs Identify acceptable flux residue levels by product class © HDP User Group International, Inc.

© HDP User Group International, Inc. Project Objectives Identify the influence of PCB manufacturing defects and design properties on the development of ECM and corrosion failures. Primary areas of investigation: Exposed Cu from solder mask openings (pin holes, undercut, damage, etc.) Moisture and chemical absorption properties Minimum cure level Voltage bias on a trace Minimum spacing between positive and negative features to prevent ECM © HDP User Group International, Inc.

Proposed Execution Plan How the project will answer the Goal and Objectives Compile list of current test methods / standards / test vehicles Compile list of failure modes from team members Correlate corrosion failures to gaps in current test methods Identify modifications required to current test methods Develop DOE’s to validate proposed changes Perform DOE’s. Collect and evaluate test data Draft proposed changes to test methods / standards / test vehicles Provided proposed changes and supporting data to test standard owners. Write final report

Current Project Activities Completed list of current test methods Completed identification of failure modes observed with no clean residues Started gathering existing possible Test Vehicles. Have met with IPC sub-committees on Coatings, Cleaning and Testing to discuss our activity. Established the basic project plan. Started to Identify the flux variables to be used in DOE. Started a study of how to recreate the failure mechanism on the Test Vehicle.

Test Plan / DOE First step is to reproduce the failure modes on test coupons. Develop a Screening DOE / test plan to reproduce failure modes on test coupons Select or design test coupons Determine features that must be added to test coupons to reproduce failure modes Select Flux materials Flux application methods to use Mixing of fluxes Applied flux and flux residue characterization procedure Test procedures to use Build / testing Inspection Entrapment of fluxes under components (QFN’s, chip capacitors, etc) High voltage is worse for high resistance shorts. Develop DOE matrix for full selection of fluxes

First Phase initial build on real product samples DOE #1 Plan – Reproduce the open trace failure mode in a test environment First Phase initial build on real product samples OSP finish 10 pieces with solder mask openings created prior to assembly. Multiple locations, multiple sizes. (Done) 10 pieces with solder mask openings created after wave solder. Multiple locations, multiple sizes. (Done) Characterize flux amount applied, and flux residue remaining on the boards (in process) weigh coupons C3 / IC analysis of residue T&H chamber test: (Not started) 40 C 90% RH Boards powered during test Test to failure

DOE #1 Test board prep Solder mask openings were created on test samples before the SMT process, and after the wave solder process Loc 1 Before SMT Loc 1 After Wave Loc 2 Before SMT Loc 2 After Wave Sample 1 Sample 2 Sample 3

DOE #1 Plan Second Phase: Reproduce first phase parameters on a trace test coupon boards. Develop a repeatable method to reproduce the failure mode on a small, inexpensive test coupon board Multiple trace widths and spacing Multiple solder mask openings Pads and vias Multiple voltages Acceleration test parameters (Temp, Humidity, time, etc)

DOE #1 Plan Third Phase: Evaluate different process settings to identify threshold for failures: Flux amount applied Flux type used Flux residue Amount of residue after wave solder Activity level of residue Presence of solder mask opening prior to or after wave solder Impact of voltage level Impact of moisture level Process parameters Impact of preheat and wave contact time on residue levels

DOE #2 Plan Determine how to apply the information learned in DOE #1 to identify weakness or changes to the current industry standard test protocols and coupon designs

Industry Standard Test Methods to consider

No clean flux failure modes Open Trace Corrosion Failure Corrosion Mechanism: A form of crevice or pitting corrosion at the small solder mask opening and the trace. Failure mode dependencies: Openings or defects in solder mask Voltage bias Activity level, type, and quantity of flux residue Humidity levels Potential areas to investigate with current test methods: Modify test coupon to detect crevice or pitting corrosion failure modes? Solder mask openings on test coupon (pitting corrosion) Flux trapped under low stand off connections (crevice corrosion) Measure flux residue levels (identify threshold of acceptable residual flux contaminants) Multiple voltages to traces or nets on the test coupon (identify voltage level sensitivity) Multiple humidity levels © HDP User Group International, Inc.

No clean flux failure modes + 3V GND + 3V Non soldered OSP Corrosion Mechanism: Surface corrosion Surface Corrosion Failure Failure mode dependencies: Voltage bias Activity level, type, and quantity of flux residue Humidity levels Potential areas to investigate with current test methods: Measure flux residue levels (identify threshold of acceptable residual flux contaminants) Multiple voltages to traces or nets on the test coupon (identify voltage level sensitivity) Multiple test pad and hole sizes Multiple surface finishes Multiple humidity levels © HDP User Group International, Inc.

No clean flux failure modes + 3V anode GND Corrosion Mechanism: Electrochemical Migration – metal dendrite growth ECM Corrosion Failure Failure mode dependencies: Openings or defects in solder mask (exposed anode / + voltage) Voltage bias Activity level and quantity of flux residue Humidity levels Potential areas to investigate with current test methods: Modify test coupon to provide exposed anode adjacent to ground features (already exists?) Measure flux residue levels (identify threshold of acceptable residual flux contaminants) Multiple voltages to traces or nets on the test coupon (identify voltage level sensitivity) © HDP User Group International, Inc.

Proposed Execution Plan Definition Stage 1. Complete list of current test methods/standards/test vehicle. Complete 2. Compile list of failure modes from team members. Complete 3. Correlate corrosion failures to gaps in current test methods. 4. Identify modifications required to current test methods. 5. Develop DOE’s to validate proposed changes. 6. Perform DOE’s, collect and evaluate data. 7. Draft proposed changes to test methods/standards/test vehicle. 8. Provide proposed changes and support data to test standards owner. 9. Write final report Implementation Stage Complete In-Process Not Started

© HDP User Group International, Inc. Team Members –To Date Agilent Fujitsu Plexus Alcatel-Lucent H3C Rockwell Arlon Huawei Suntak ASE IBM Shengyi Celestica Isola TTM Tech Ciena IST Group Ventec Cisco Kyzen Zestron Cobar Medtronic ZTE Dell Nihon-Superior Emerson Oracle Ericsson Panasonic Flextronics Phillips © HDP User Group International, Inc.