CE1110: Digital Logic Design Sequential Circuits.

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Presentation transcript:

CE1110: Digital Logic Design Sequential Circuits

Sequential Circuit – Introduction – Memory types Latches – SR-latch – D-latch Flip-flops – Master-slave D-flip flop – Edge triggered D-flip flop

Outputs depend on the sequence of past inputs. As a result, the circuit must “remember” something about the past. Ex: In foot ball game, – The score of the goals = the pervious goals (state) + new goal (input) – For example if you have pervious goal score of 5 and there’s a new goal then the final score will be 6 Past state = 5 scores, and input = 1 score So, the new score state will be=5+1=6 scores Sequential Logic Circuits