Interconnection in IC Assembly Level of Interconnection, Wire Bonding, Tape Automated Bonding (TAB), Flip Chip DMT 243 – Chapter 4 M.Nuzaihan

Interconnection in IC Assembly Flip Chip First invented in 1962 at IBM; called Solid Logic Technology Converted in 1970 to Controlled Collapse Chip Connection (C4) C4 is one type of mounting used for semiconductor devices, such as Chips, MEMS or components, which is using solder bumps instead of wire bonds. The solder bumps are deposited on the chip pads, located on the top side of the wafer, during the final wafer processing step. In order to mount the chip to external circuitry (on a circuit board or another wafer or a chip), it is flipped around – the top-side facing down the mounting area. The solder bumps are used to connect directly to the associated external circuitry. DMT 243 – Chapter 4 M.Nuzaihan

Interconnection in IC Assembly Flip Chip Basic structure of flip chip consists of IC or chip, interconnection system and substrate. IC or chip –Si, GaAs, IP, Si-Ge and etc Interconnection system (IC bond pad interface) –under bump metallization (UBM), chip bumps, bond material between the bump and substrate metallization, encapsulation and substrate metallization Substrate –Ceramic (C4), epoxy glass laminate, polymer thin-film build-up, resin coated copper (RCC), glass, silicon, dieletric-coated metal, liquid crystal polymer, dielectric metal matrix composite, low-temperature co-fired ceramic (LTCC), ceramic thick film, multilayer high temperature co-fired ceramic and etc. DMT 243 – Chapter 4 M.Nuzaihan

Interconnection in IC Assembly Flip Chip DMT 243 – Chapter 4 M.Nuzaihan

Flip Chip Technology DMT 243 – Chapter 4 M.Nuzaihan

Interconnection in IC Assembly Flip Chip Advantages Lower cost than wirebonding since the bumping done at wafer level; high I/O; all connections are made simultanenously. Higher reliability than either wirebonding or beam lead bonding (TAB). Book claims flip chip was succesfully made from 1960-1990 without any failure related to FC  implemented for ceramic substrates Better electrical performance due to lower resistance, capacitance and inductance. Provide shorthest path between IC and substrate. Repairability—If an IC was defective, either during assembly or during usage, it can be removed and a new IC if flip chip bonded on the same ceramic again. Improved chip designs may be substituted on multichip modules DMT 243 – Chapter 4 M.Nuzaihan

Interconnection in IC Assembly Flip Chip Disadvantages More cost on infrastructures. Involved of a few process before interconnection can be made. Unprotected flip chips are prone to thermally induced cracking solder connections and even damage the device itself. The effects of this thermal mismatch can be lessened considerably with the use of an underfill. Not a good choice (low cost solution) for less I/O DMT 243 – Chapter 4 M.Nuzaihan

Interconnection in IC Assembly Flip Chip - Process steps DMT 243 – Chapter 4 M.Nuzaihan

Interconnection in IC Assembly Flip Chip - Process steps Integrated circuits are created on the wafer Pads are metalized on the surface of the chips Solder dots are deposed on each of the pads Chips are cut Chips are flipped and positioned so that the solder balls are facing the connectors on the external circuitry Solder balls are then remelted (typically using ultrasound) Mounted chip is “underfilled” using an electrically-insulating adhesive DMT 243 – Chapter 4 M.Nuzaihan

DMT 243 – Chapter 4 M.Nuzaihan

DMT 243 – Chapter 4 M.Nuzaihan

Interconnection in IC Assembly Under Bump Metallization (UBM) UBM is a multilayer thin films between IC metallization, passivation layer and solder bump. The structure consists of an adhesion layer covering up the chip metallization (Cr, Ti, Ni, W TiW ) A barrier layer (Cr, W, Ti, TiW, Ni, Cr-Cu) A wetting layer (Cu, Ni, Pd, Pt) An anti-oxidation barrier layer (Au) DMT 243 – Chapter 4 M.Nuzaihan

Interconnection in IC Assembly Under Bump Metallization (UBM) UBM is necessary. To protect the Al metallized chip from moisture and corrosion. To remove the Al2O3 and provide a good adhesion to Al and reduce the interfacial resistance. Barrier layer to prevents the solder (mainly Sn) from corroding the Al or dewetting Cr wetting layer. Wetting layer because solder will not wet the metal deposited for the barrier or bare Al. DMT 243 – Chapter 4 M.Nuzaihan

Interconnection in IC Assembly Under Bump Metallization (UBM) - Process Evaporation DMT 243 – Chapter 4 M.Nuzaihan

Interconnection in IC Assembly Under Bump Metallization (UBM) - Process Electroplated DMT 243 – Chapter 4 M.Nuzaihan

Interconnection in IC Assembly Under Bump Metallization (UBM) - Process Sputtering DMT 243 – Chapter 4 M.Nuzaihan

Interconnection in IC Assembly Under Bump Metallization (UBM) - Process Electroless DMT 243 – Chapter 4 M.Nuzaihan

Interconnection in IC Assembly Flip Chip Bumps The bumps provide four functions Electrical connection between the chip and the substrate A heat dissipation path from the chip Environmental protection to the final metal layer (Al bond pad) A structural link between the chip and substrate DMT 243 – Chapter 4 M.Nuzaihan

Various Flip Chip Bumps Stacked Stud Bumps Gold Stud Bumps Indium Bumps Solder Bumps Nickel Bumps Gold Bumps DMT 243 – Chapter 4 M.Nuzaihan

Interconnection in IC Assembly Solder Bumps Solder bumps are deposited onto the UBM – Several method: Evaporation Electroplated Screen printing Solder jet technology Ball drop Micro Ball Placement and etc. DMT 243 – Chapter 4 M.Nuzaihan

Solder Bumps - Printing DMT 243 – Chapter 4 M.Nuzaihan

Solder jet technology DMT 243 – Chapter 4 M.Nuzaihan

Solder Ball Bumping (SBB) – Ball Drop DMT 243 – Chapter 4 M.Nuzaihan

Micro Ball Placement DMT 243 – Chapter 4 M.Nuzaihan

Solder Bumps Solder primary material system High temperature with melting points in excess of 250°C (examples include 95%Pb - 5%Sn and 97% Pb – 3%Sn) Moderate temperature with melting points between 200 and 250°C (examples include 95.5%Sn-3.5%Ag-1%Cu; CASTIN® Cu-Ag-Sb-Sn and 85.9%Sn-3.1%Ag-10%In-1%Cu and 96.5% Sn-3.5% Ag) Low temperature with melting points less than 200°C (examples include 37%Pb-63%Sn eutectic, 88% In – 12%Pb, 100% In and 48% Sn-52% In) DMT 243 – Chapter 4 M.Nuzaihan

Flip Chip (Bump Interconnection) Processing There are several interconnection processing technologies: Solder interconnect processing Isotropic conductive adhesive Anisotropic conductive adhesive DMT 243 – Chapter 4 M.Nuzaihan

Solder interconnect processing DMT 243 – Chapter 4 M.Nuzaihan

Conductive Adhesive Interconnection System The basic structures of two major adhesive interconnection systems: Isotropic conductive adhesive Anisotropic conductive adhesive DMT 243 – Chapter 4 M.Nuzaihan

Solder Bumped Flip Chip on Organic Substrate Stencil Printing Solder Paste on PCB Pick & Place part on PCB Room Temperature (25oC) Underfill melting & reflowing (75oC) Forming solder joint (183oC) Organic Substrate Underfill Solder-Bumped Flip Chip Solder Joints TCE of Organic Substrate = 18x10-6/oC TCE of Silicon Chip = 2.5x10-6/oC DMT 243 – Chapter 4 M.Nuzaihan

Underfill Encapsulation and Processing DMT 243 – Chapter 4 M.Nuzaihan

Flip Chip – Product Examples Flip Chip on Organic Circuit Board Application DMT 243 – Chapter 4 M.Nuzaihan

Flip Chip – Product Examples Flip Chip for a Consumer Product DMT 243 – Chapter 4 M.Nuzaihan