EEV CCD39 wavefront sensor cameras for AO and interferometry SciMeasure Analytical Systems, Inc. Ray DuVarney, Charlie Bleau, Garry Motter Emory University,

Slides:



Advertisements
Similar presentations
CAVITY LOCK ELECTRONICS Dan Sexton, Sirish Nanda, and Abdurahim Rakhman.
Advertisements

INPUT-OUTPUT ORGANIZATION
Data Acquisition Concepts Data Translation, Inc. Basics of Data Acquisition.
Digital Camera Design. Agenda Digital video formats Image sensor technology Sensor interface with CoolRunner-II LCD CoolRunner-II system design.
In situ testing of detector controllers Roger Smith Caltech
STARLight PDR 3 Oct ‘01I.1 Miller STARLight Control Module Design Ryan Miller STARLight Electrical Engineer (734)
Super Fast Camera System Performed by: Tokman Niv Levenbroun Guy Supervised by: Leonid Boudniak.
Astronomical Array Control & Acquisition System at NAOC Zhaowang Zhao Binxun Ye Research Labs for Astronomy National Astronomical Observatories, Chinese.
Wojtek Skulski CERN Oberon Day March /2004 Experiment control and data acquisition using BlackBox Component Builder Wojtek Skulski Department of Physics.
Design and Implementation of a Virtual Reality Glove Device Final presentation – winter 2001/2 By:Amos Mosseri, Shy Shalom, Instructors:Michael.
Aztec PC Scope Preliminary Design Review Fall 2006 Michael MasonJed Brown Andrew YoungsJosh Price.
Aloha Proof Module Design Cabled Observatory Presentation School of Ocean and Earth Science and Technology February 2006.
Detector Array Controller Based on First Light First Light PICNIC Array Mux PICNIC Array Mux Image of ESO Messenger Front Page M.Meyer June 05 NGC High.
The Technion Israeli Institute of Technology Intel Inc. A cooperation of:
Laser Tracking System (LTS) Team Lazer: Son Nguyen Jassim Alshamali Aja ArmstrongMatt Aamold.
ASPPRATECH.
Manfred Meyer & IDT & ODT 15 Okt Detectors for Astronomy 2009, ESO Garching, Okt Detector Data Acquisition Hardware Designs.
INPUT-OUTPUT ORGANIZATION
A compact, low power digital CDS CCD readout system.
SciMeasure Wavefront Sensor Cameras and their Application in the 5m Palomar Adaptive Optics System SciMeasure Analytical Systems, Inc. Ray DuVarney, Charlie.
DES Collaboration Meeting, Chicago, December 11-13, 2006 T. Shaw1 DES Collaboration Meeting Front End Electronics Status T. Shaw, D. Huffman, M. Kozlovsky,
Camera Link Communication Interface for Vision Applications J. Egri 6/7/05.
Video Monitor Uses raster scanning to display images
SE-IR Corporation 11/04 Goleta, CA (805) CamIRa TM SE-IR Corporation 87 Santa Felicia Dr. Goleta, CA (805)
Digital Display Video Product Sales Guide.
Digital Correlated Double Sampling for ZTF Roger Smith and Stephen Kaye California Institute of Technology The digital equivalent of dual slope integration.
DEEPAK.P MICROPROCESSORS AND APPLICATIONS Mr. DEEPAK P. Associate Professor ECE Department SNGCE 1.
Programmable logic control Data Processing Computer System Key Board Light Pen Mouse PLC a Process Control Computer System Motion Sensor Sound Sensor.
Lecture 111 Lecture 11: Lab 3 Overview, the ADV7183B Video Decoder and the I 2 C Bus ECE 412: Microcomputer Laboratory.
1 Sensors and Measurements Penderia & Pengukuran ENT 164 Signal Processing Elements Hema C.R. School of Mechatronics Engineering Northern Malaysia University.
Laser DCS meeting, Utrecht, 13 June 2005Børge Svane Nielsen, NBI1 TPC laser controls adjustable mirrors Laser Controls, Power, Cooling DCS: 1/ Laser controls.
SciMeasure Wavefront Sensor Cameras and their Application in the 5m Palomar Adaptive Optics System SciMeasure Analytical Systems, Inc. Ray DuVarney, Charlie.
LSU 10/22/2004Serial I/O1 Programming Unit, Lecture 5.
Background   Who does this project addresses to?   Handicapped.   Amputated limbs.   Paralyzed.   Motivation Statistics.
ISUAL Sprite Imager Electronic Design Stewart Harris.
Intelligent Autonomous Camera Module (IAKM). Goals Develop an intelligent camera unit with the following features: –Standalone; –Equipped with extraordinary.
Electronics for PS and LHC transformers Grzegorz Kasprowicz Supervisor: David Belohrad AB-BDI-PI Technical student report.
Team 2 Yimin Xiao Jintao Zhang Bo Yuan Yang.  The project we propose is a digital oscilloscope with playback function that provides almost any function.
DLS Digital Controller Tony Dobbing Head of Power Supplies Group.
SPCA554A Mobile Camera Multimedia Processor By Harrison Tsou.
(More) Interfacing concepts. Introduction Overview of I/O operations Programmed I/O – Standard I/O – Memory Mapped I/O Device synchronization Readings:
Desktop Video. Basics Desktop Video Desktop Video Frame Rate Frame Rate.
K.C.RAVINDRAN,GRAPES-3 EXPERIMENT,OOTY 1 Development of fast electronics for the GRAPES-3 experiment at Ooty K.C. RAVINDRAN On Behalf of GRAPES-3 Collaboration.
Group 8: Video Game Console Team Members: Rich Capone Hong Jin Cho Dave Elliott Ryan Gates.
IWORID P.Randaccio Medipix2 Parallel Readout System 4-th IWORID Amsterdam 8 – 12 September 2002 V. Fanti, R. Marzeddu, P. Randaccio Dipartamento.
Phase-1 Design. i PHC Phase /04/2008 System Overview Clock, JTAG, sync marker and power supply connections Digital output.
© 2004 Xilinx, Inc. All Rights Reserved Implemented by : Alon Ben Shalom Yoni Landau Project supervised by: Mony Orbach High speed digital systems laboratory.
A Front End and Readout System for PET Overview: –Requirements –Block Diagram –Details William W. Moses Lawrence Berkeley National Laboratory Department.
Features of the new Alibava firmware: 1. Universal for laboratory use (readout of stand-alone detector via USB interface) and for the telescope readout.
W.Skulski APS April/2003 Eight-Channel Digital Pulse Processor And Universal Trigger Module. Wojtek Skulski, Frank Wolfs University of Rochester.
Alexei SemenovGeneric Digitizer Generic Digitizer 10MHZ 16 bit 6U VME Board.
Computer Hardware A computer is made of internal components Central Processor Unit Internal External and external components.
ERC - Elementary Readout Cell Miguel Ferreira 18 th April 2012
A Programmable Single Chip Digital Signal Processing Engine MAPLD 2005 Paul Chiang, MathStar Inc. Pius Ng, Apache Design Solutions.
Sensor testing and validation plans for Phase-1 and Ultimate IPHC_HFT 06/15/ LG1.
6.111 Final Project A motion sensor baseball game By Chris Falling and JinHock Ong.
Single Board Controller Comments Roger Smith Caltech
Hawkeye CCD University
Submitted by:.  Project overview  Block diagram  Power supply  Microcontroller  MAX232 & DB9 Connector  Relay  Relay driver  Software requirements.
A versatile FPGA based photon counter and correlator sudersan dhep meet’16.
FPGA-Workshop FPGA-based Tomographycameras / Jülich Jörg Burmester, Jörn Plewka, Stephan Meyer-Loges HZG/TKE.
BITS Pilani Pilani Campus Pawan Sharma ES C263 Microprocessor Programming and Interfacing.
Electronic Devices and Circuit Theory
Readout System of the CMS Pixel Detector
PC Mouse operated Electrical Load Control Using VB Application
96-channel, 10-bit, 20 MSPS ADC board with Gb Ethernet optical output
Chapter 13 Linear-Digital ICs
SciMeasure Analytical Systems, Inc.
VGA INTERFACE Ly Le Department of Electrical Engineering
Eye Movement Tracking Device Senior Design Project: P09004
Presentation transcript:

EEV CCD39 wavefront sensor cameras for AO and interferometry SciMeasure Analytical Systems, Inc. Ray DuVarney, Charlie Bleau, Garry Motter Emory University, Department of Physics Ray DuVarney* NASA/JPL, Interferometry Systems Group Rich Dekany, Mitch Troy, Gary Brack, Thang Kieu, Dean Palmer * has a financial interest in SciMeasure Analytical Systems, Inc. NASA/JPL, Interferometry Metrology Group Stuart Shaklan, Andy Kuhnert

Camera System Overview Camera Control Unit Power Supply Camera Head CCD Enclosure Clocks Biases TEC Video 1.2 Ghz Bi-directional Control/data Fiber-optic Link RS-232 Control Halt Signal RS-170 Video Data Out 4 12-bit Data Ports Overflow/handshake Port (SOF/SOL/DRDY) Stopped Status FIBER COMM & DATA REALTIME DISPLAY GRAPHICS DISPLAY VIDEO OVERLAY DATA CAPTURE SEQUENCER +5V DIGITAL ±12V ANALOG +24V ANALOG CLOCK DRIVERS FIBER COMM & DATA ANALOG PROCESSOR PREAMPLIFIER CCD

4-3 Sequencer Address Bus Data Bus ProgramsSubroutinesPatterns bit 32-bit Address Generator Addr Mux 32K Static RAM Data Mux Addr Mux 32K Static RAM Data Mux Addr Mux 32K Static RAM Data Mux Address Generator 50 MHz Clock ISA Bus Inter- face Data O/P Address Generator Ext. Select & Sync

Sequencer Programming Programs Subroutines Patterns define program 0;# 1100 Hz Nominal subroutine start_of_frame; repeat 32; subroutine read_line; end repeat; repeat 2; subroutine integrate; end repeat; end define; define subroutine read_line; pattern send_start_of_line1; pattern shift_line1; pattern wait10; pattern shift_pixel17; pattern read_pixel32; end define; define pattern read_pixel; # # t = /turbo, c = /clamp, S = sample, V = *DCAV # RG IA BS OR xxx t c S CCCC FV xx # ; # ; # ; # ; # ; # ; # ; # ; # ; # ; # ; # ; # ; # ; # ; # ; # end define;

Fiber Link CAMERA CONTROL UNIT (CCU) CAMERA HEAD UNIT (CHU) Filter Offset Gain CCD Clocks Clamp Sample Turbo Digital Video Ports Digital Data Ports External Sequencer Data 1.2 Ghz Bidirectional Control/data Fiber-optic Link MUXMUX MUXMUX DEMUXDEMUX DEMUXDEMUX ONBOARD SEQUENCER TRANS- CEIVER ONBOARD SCAN CONVERTER TEMP/VACUUM STATUS, ETC DATA TRANS- CEIVER CONTROL CLOCKS

Clock Driver Board 12 Individually Programmable Clocks ±11V Range 16V Maximum Swing 20 ns Switching Time -12V +12V TTL InVout V low V span Variable Regulator Level Shifter EL 7182

Preamplifier Board A=5 75 ohm drivers Video Outputs Temperature CCD Clocks CCD Biases TEC Power Clock Filters Bias Filters TEC Filters CCD Peltier Pack

Analog Processor Sample Offset Clamp Video Gain Filter Turbo Data 1 of 4 channels 75 ohms HIGH SPEED SHUNT TIME CONST. 1 of 4 GAIN 1 of 4 CLAMP OFFSET A/D

Data Output/Display/Capture Data R G B S RS-170 Video Data Stream Realtime Data Ports ISA Bus Data Capture Card Realtime Display Card Fiber Link Card 1 MEGAPIXEL DUAL PORT STATIC RAM ISA BUS INTERFACE RS- 422 STATIC RAM REALTIME SCAN CONVERTER INTERNAL SCAN CONVERTER DEMUXDEMUX

Control Panel

Camera Performance EEV CCD x64 pixel frame size - Read Noise calculated from Photon Transfer curve MIT/LL CCID19 achieved Mpix/sec/port and 600 frames/sec

Palomar AO System

PALAO Results AO Loop Open FWHM = 1.2" AO Loop Closed FWHM = 0.097" (Strehl = 20%) QS Aql (HR 7486) Binary Star with 0.185" Separation

MAM Vacuum Tank

Control Panel

Future Camera Overview I Control Unit Power Supply Camera Head CCD Enclosure Clocks Biases TEC Video 1.2 Ghz Bi-directional Control/data Fiber-optic Link RS-232 Control Halt Signal Data Out/Handshake 16-bit Data Ports SOF/SOL/DRDY Stopped Status FIBER COMM/DEMUX POWER/BIASES CONTROLLER/SEQUENCER CLOCK DRIVERS FIBER COMM/MUX ANALOG PROCESSOR(S) 12, 14 or 16-bit options PREAMPLIFIER CCD 160 mm 3U cards DATA OUTPUT

Future Camera Overview II Power Supply Camera Head CCD Enclosure Clocks Biases TEC Video RS-232 Control Halt Signal 16-bit Data Ports & SOF/SOL/DRDY Stopped Status POWER/BIASES CONTROLLER/SEQUENCER CLOCK DRIVERS ANALOG PROCESSOR(S) 12, 14 or 16-bit options PREAMPLIFIER CCD 160 mm 3U cards DATA OUTPUT

Acknowledgements SBIR Phase I Grant NAS SBIR Phase II Grant NAS Horace Dale - Physics Dept, Emory University Betty Motter - SciMeasure Part of the research described herein was carried out at the Jet Propulsion Laboratory, under a contract with the National Aeronautics and Space Administration