Final Presentation Annual project (Part A) Winter semesterתש"ע ((2009 Students: Oren Hyatt, Alex Dutov Supervisor: Mony Orbach

 Problem: A GPS system isn’t fast enough, to meet updating requirements of high speed systems.  Solution: Implementation of a system that integrates GPS, INS, and a particles filter.

 Implementation of the resampling & regularization parts.  Interface with the other parts of the system.  Meet hardware\software requirements (see specs.).

Format’s Notation: X.YY.ZZZ ~ sign ; number ; fraction W[0.0.28]Index_out[0.16.0] Reject insignificant particles. Duplicate remained particles, with respect to their relative weight.

Logic Accuracy Speed Hardware Resources usage working fmax (timing sim.)timing sim N /fmaxComb.ALU Dedicat ed logic regs. Total regs. Total block memory bits DSP 18bits 187[Mhz]161[usec]524 (<1%) 146 (<1%) 146 (<1%) 2,097,152 (25%) 4 (<1%) Footnotes: Rand(); can ran at 122 [Mhz], pre-called to boost performance. Could not further decrease storage cells. In order to get the exact same results, as C’s, use Rand.enableseed(var_seed); before the iteration.

N(0,1) sqp_in[23..0]*** epsilon[23..0]** hopt[52..0]* *hopt is a constant **epsilon is normally distributed ***Generated by lab’s: D1828 Xp_reg_new[105..0] const

Logic Accuracy Speed Hardware Resources usage working fmax (timing sim.)timing sim N /fmaxComb.ALU Dedicated logic regs. Total regs. Total block memory bits DSP 18bits 23.8[Mhz]1.26[usec]13378 (16%) 318 (<1%) 318 (<1%) 0154 (17%) norm dist [Mhz]1.26[usec]12810 (15%) 4775 (6%) (<1%) 32 (4%) Footnotes: *used a high margin of safety. Rand.norm() is problematic. Throughput of Matrix multiplication step, could be doubled. With low cost of resources (later). According to D1828: sqp_in, takes more than allowed time. Thus, latency would be unacceptable. Step I

Limit to [-pi,pi] [1.1.22] Input is output of StepI All 3 angles, are normalized: 1=2*pi [rad] Range of both angles and q’s is: [-1,1] q1[1.1.22] q2[1.1.22] q3[1.1.22] q4[1.1.22] convert Euiler to quternions qi=sign(q1)

Footnotes: Could successfully avoid usage of SQRT(), which saved both speed and recourses. A room for trade-off between area and time, in using trig. Fuctions. Logic Accuracy Speed Hardware Resources usage simulation fmax (timing sim.)timing sim N /fmaxComb.ALU Dedicated logic regs. Total regs. Total block memory bits DSP 18bits 15.7 [Mhz] 1910 [usec] (16%) 318 (<1%) (17%)

1. Seed of the randomly generated numbers, depends on the number of times the method is being called. 2. Normally distributed numbers, generated in an acceptance-rejection method.

1. Uniformly generated numbers, would be generated in the exact same method as in C’s library file. Each part would have it’s own generating object. 2. As acceptance-rejection method, could not be used, ditched and an alternative method was used.

1. Can be used in synchronic logic. 2. Not necessarily more costly in time, nor in HW resources. 3. Working.

1. The generation is very costly in both time and logic (could be even worse).very costly 2. We rely on mathematical functions, and any usage in them, should be done carefully. 3. Since there is no faster reasonable way to generate the numbers. And the method is called a large number of times. A bottleneck was created.

A thorough simulation with regularizations steps integrated. Would be done. An enveloping state machine, to interact with the FIFO. Would be done, Approx. two weeks. There’s a way to double regularization’s speed, for each particle, with a low HW cost. A detailed guide would be added to our book. Further analyzing normal distribution component. Return on time spent is too low.

As time passed, and problems arise, the Gantt should be modified. A periodically meeting, with the other teams, including a summary to all other teams. Could help a lot.

Thank you.

Logic Accuracy Speed Hardware Resources usage working fmax (timing sim.)timing sim N /fmaxComb.ALU Dedicat ed logic regs. Total regs. Total block memory bits DSP 18bits 187[Mhz]161[usec] ,097,1524 Footnotes: Rand(); can ran at 122 [Mhz], pre-called to boost performance. Could not further decrease storage cells. In order to get the exact same results, as C’s, use Rand.enableseed(var_seed); before the iteration.

Logic Accuracy Speed Hardware Resources usage working fmax (timing sim.)timing sim N /fmaxComb.ALU Dedicat ed logic regs. Total regs. Total block memory bits DSP 18bits 187[Mhz]161[usec]524(<1%)146 (<1%) 146 (<1%) 2,097,152 (25%) 4 (<1%) Footnotes: Rand(); can ran at 122 [Mhz], pre-called to boost performance. Could not further decrease storage cells. In order to get the exact same results, as C’s, use Rand.enableseed(var_seed); before the iteration.

Index_out = [0,0,2,3,4,5,5,5,5,5] * Offset of 1, because matlab starts arrays with index 1.

PerformanceResource usage Pipe sizeClock(MHz) Mean accuracy(%) Comb.ALU Dedicated logic registers Trig block* 2÷ ÷ ÷ ÷1381 SQRT block* ALTFP_INV_SQRT Single Precision3521,392 ALTFP_LOG21360Single Precision *See lab’s project: D0928- system architecture and math functions Reg. 1

Matlab HW Error [pct] Matlab HW Error [pct] …. …..

Footnotes: Could successfully avoid usage of SQRT(), which saved both speed and recourses. A room for trade-off between area and time, in using trig. Fuctions. Logic Accuracy Speed Hardware Resources usage simulation fmax (timing sim.)timing sim N /fmaxComb.ALU Dedicated logic regs. Total regs. Total block memory bits DSP 18bits 15.7 [Mhz] 1910 [usec]

Total hardware report. Regularization’s matrix mult + xp_reg_new.

Logic simulation. Regularization’s stepII (e2q_all -> end). Phy Psi Theta q1 q2 q3 q E00000 Expected:

Logic Accuracy Speed Hardware Resources usage working fmax (timing sim.)timing sim N /fmaxComb.ALU Dedicated logic regs. Total regs. Total block memory bits DSP 18bits 0.1*%23.8[Mhz]1.26[usec]13378 (16%) 318(<1%)318 (<1%) 0154 (17%) norm dist [Mhz]1.26[usec] Step I