Grenoble, June 22nd 2009 Libera Workshop 2008 Peter Leban, Andrej Košiček Libera Brilliance, Recent Patches, new Ideas, Future Grenoble,

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Presentation transcript:

Grenoble, June 22nd 2009 Libera Workshop 2008 Peter Leban, Andrej Košiček Libera Brilliance, Recent Patches, new Ideas, Future Grenoble, June 22nd 2009

Release 2.00 issued in December 2008 Current patch release 2.04, sent out last week MAIN FEATURES Release 2.00Release 2.02Release 2.03/ Upgrade to armel platform - Considerably faster floating point operation - Use of NPTL (Native Posix Threading Library) - Using pipes for passing events instead of signals - Improved DHCP functionality - FPGA/SBC throughput increased by cca 30% - Programmable PM triggering - Spike Removal on TbT, FA and SA data - Position calculation from ADC rate buffer (single pass, CW) - Bugfixes - PM buffer with d64 data - Faster AGC - Integration of DLS Communication Controller - Bugfixes Libera Brilliance/Electron Current Status

Grenoble, June 22nd Propositions: Access to DSC Coefficients Proposed By:Description / Benefits ESRF/Instrumentation Technologies - If a component in the analog chain fails (behind analog switch), the measurement is still valid if the DSC (switching) is on. - This is because the input signals are all rotated through all channels. - This can result in slight position offset and slightly increased RMS. - Such status can be effectively diagnosed by monitoring the DSC (amplitude compensation) coefficients.

Grenoble, June 22nd Propositions: Beam life-time Measurements Proposed By:Description / Benefits ESRF- Libera Brilliance has a potential to rival standard current monitors in speed & stability. - The other advantage is that there are lots of Liberas around the ring, allowing better statistics. - Life-time measurement is based on the decay of the averaged SA-Sum signal (over certain period of time).

Grenoble, June 22nd Propositions: Standard & MAF Designs Together Proposed By:Description / Benefits ESRF- Possibility to have the Standard & the MAF design installed on memory inside each Libera. - to load the desired design into FPGA by a local script - possibly no need to restart Tango (or other control system) device-servers after a design change.

Grenoble, June 22nd Propositions: Bypass Notch when DSC (switching) off Proposed By:Description / Benefits NSLS2- The Notch filter in FA data chain is inserted to suppress the lower switching harmonic. - If DSC is off, the Notch is not needed. - Could be usable for testing purposes since during normal operation DSC should be on.

Grenoble, June 22nd Propositions: ADC Offset Compensation Proposed By:Description / Benefits NSLS2- The goal is to achieve better accuracy for single pass position measurement from ADC rate buffer, especially at lower ADC counts. - Feature does not need any additional runtime parameter. - Simple calculation (here for channel A): ChA_offset=mean(channelA); channelA=channelA-ChA_offset;

Grenoble, June 22nd Propositions: Timestamp on SA Data Proposed By:Description / Benefits NSLS2- To include timestamp in SA data as an additional column. - This should be a counter which is reset with set-time trigger.

Grenoble, June 22nd Propositions: ADC Underflow Checking Proposed (and Ordered) By:Description / Benefits ESRF- The goal is to prevent unnecessary Interlock triggering when the beam is lost. - The algorithm checks the amplitude on all 4 channels - If the level is below predefined limits (e.g. 700 counts on 16bit ADCs) on all channels, the Interlock is not triggered.

Grenoble, June 22nd Propositions: Statistics calculation inside Libera Proposed By:Description / Benefits ESRF- The calculation of RMS and mean value on DD and SA data. - Check the beam’s AC stability - The goal is to reduce the amount of data transfer through internal network and further calculation in the servers. - User would define the number of samples for calculation. - Calculation for position and amplitudes.

Grenoble, June 22nd 2009 Future of Libera Brilliance (dreaming…) Possible scenariosPurposeChange The Release 2.20 Constantly upgrading with new functionalitiesSW Graphical User Interface (GUI); independent of Epics and Tango (?) To help new users, on-click parameter settings, on-click acquisitions SW Upgraded Libera Brilliance: bigger FPGA To provide more space for FPGA software programming HW Libera Brilliance on the new platform Completely new platform with new software, the new instrument generation; using same principles for data processing HW, SW

Grenoble, June 22nd 2009 Thank you for your attention.