A Low-mass Tracking System for the new Di-Electron GSI GSI Darmstadt, LHE/JINR Dubna, IKF Frankfurt, MEPhI Moscow, IPN Orsay, FZ Rossendorf WCC 98, Vienna
Concept of the HADES Spectrometer Lepton Identification l RICH n Radiator: C 2 F 6 n Spherical mirror, CaF 2 window n Photon detector: CsI photo cathode l META n TOF plastic scintillators n Shower detector (lead converter)Tracking l Super-conducting Toroid (6 coils) n B max = 0.7 T, Bending power 0.34 Tm l Multi-wire Drift Chambers (MDC) n four planes, six layers each n small cell ( cm)
Artists views
Tasks of the Tracking System 8 General Event Characterisation Invariant Mass of Dileptons ( M 1%) 8 Background Rejection
Requirements on the MDCs Mass resolution better than 1 % ( ) n Low mass material Position resolution < 140 m ( in one module ) l Survive in high multiplicity environment n 200 charged hadrons, 20 photons n sufficient granularity, and n redundancy l Minimisation of hadronic and electromagnetic background n Low Z materials n Identification of low mass Dalitz and conversion pairs n Good position resolution of the inner two planes
MDC Design MDC Design Geometry of the Tracking System l 24 conceptually identical modules in 4 different geometries l 6 drift cell layers n redundancy for hit recognition n orientation optimised with respect to resolution in direction of the kick angle l 190 cells per layer n sufficient granularity (max multiplicity = 0.6 hits/cm along y) l cells in total
MDC Design MDC Design Summary of Design Parameters Number of channels Total size Number of modules Drift-cell layers per module Maximum drift path Cathode wires Potential wires Sense wires Counting gas l l 33 m 2 l 24 in four different geometries l 6 with stereo angles of + 40, - 20, 0, 0, + 20, + 40 degree l 5 up to 14 mm 80 m bare Aluminium 80 and 100 m bare Aluminium 20 m Au/Tungsten l He / i-C 4 H 10
Frame Design Frame Design Concept I: Power Frames 7 Used for plane I 7 forces of the wires are counter-balanced by a pre-stressed frame glued to the wire frame 7 power frame produced at low cost and sufficient precision by laser cutting 7 sense/field and cathode wires glued to the same gfc-frame
Frame Design Frame Design Concept II: controlled sag 7 Used for plane II 7 Individual layers are allowed to bend in partly 7 Frames are pre-stressed with the calculated (FEM) force of the wire plane before gluing. 7 Cathode and sense layer glued to a super-layer for practical reasons
MDC Design MDC Design Radiation thickness l Taken steps n He-based counting gas n Aluminium potential wires n He bag Total radiation thickness (x/X 0 ) 1st tracking plane Air nd tracking plane He bag rd tracking plane Air th tracking plane Total Anticipated mass resolution (0.4 < M < 1.5) < 1 %
FEM calculations FEM calculations Deformation of a Super-layer l Calculated deformation introduced to power frame before gluing inside outside n 0 0 layer x: 3,0 mm3,0 mm y: 0,1 mm1,3 mm n 20 0 layer x: 4,3 mm1,2 mm y: 0,7 mm2,1 mm n 40 0 layer x: 4,6 mm0,7 mm x: 1,3 mm 2,3 mm n 40 0 layer + cathode plane x: 2,2 mm1,1 mm y: 1,4 mm 1,8 mm
SEM of wires SEM of wires Problems with the Quality of Wire 100 m, Elisenhütte, Germany l bare aluminium (5056) l not available in 80 mm 80 mCalifornia Fine Wire, US 80 m, California Fine Wire, US l bare Aluminium (5056) l ultra finish, annealed
R&D with prototypes R&D with prototypes Choice of the Quencher l Advantage of I-butane n long drift time plateau l Increased concentration n higher primary yield n stable operation Various quenchers Quencher concentration
R&D with prototypes R&D with prototypes Simulation with GARFIELD l Intrinsic Resolution dominated by Primary Statistics
R&D with Prototypes R&D with Prototypes Test of different read-out versions Gas mixture: Helium/i-butane (60:40)
R&D with prototypes R&D with prototypes Effect of quencher concentration ,41,61,822,2 HV [kV] t [ns] 80:20 70:30 60:40 50: ,41,61,822,2 HV [kV] [ %] efficiency drift time resolution
Beam tests with Prototypes Beam tests with Prototypes External tracking of 2.1 GeV protons l Chamber equipped with ASD-8 prototype board Standard CAMAC TDC
drift-time correlation of subsequent cells Self tracking of 2.1 GeV protons Self tracking of 2.1 GeV protons Intrinsic Resolution of the Chamber Intrinsic resolution along drift path compared to Garfield simulation n Chamber behaviour quantitatively understood n Offset attributed to electronic noise
External tracking of 2.1 GeV protons External tracking of 2.1 GeV protons Constancy of the drift-time l Fit with two straights l Slight curvature disregarded
People involved in the MDC project R. Badura, H.Daues, W. Koenig, J. Hehner, J.Hoffmann, F. Schäfer, H.Stelzer, P.Zumbruch GSI Darmstadt, Germany S.Chernenko, O.Fateev, Yu.Gusakov, L.Smykov, Yu.Zanevsky LHE of JINR Dubna, Russia K.Bethge, C. Garabatos, W.Karig, Ch. Müntz, J.Stroth, J.Wüstenfeld Univ. of Frankfurt, Germany E.Atkin, Yu.Mishin, Yu.Volkov MEPI Moscow, Russia J-L. Boyard, Th. Hennino, A. Maroni, J. Peyre, J. Pouthas, V. Poux IPN Orsay, France W. Enghardt, F. Dohrmann, E. Grosse, M. Sobiella FZ Rossendorf, Germany D.Schall TH Worms, Germany
Read-out concept
R&D with prototypes R&D with prototypes Ageing with X-rays ( 55 Fe) Expected charge dose Expected charge dose 10 mC/year * no gain degradation within an equivalent of 2 years running i = 6 nA/cm
Read-out System Read-out System Read-out and digitising of 2 Gbyte/sec 8 channel TDC-ASIC l Working principle (TDC2001 a ) n Ring oscillator n 220 ps binning, 14 bit range n Zero conversion time n Multi-hit (leading/leading, leading/trailing edge) l Customised read-out interface n Token driven n Zero suppression on chip n 22 bit parallel, 25 MHz l Technology NEC CMOS-8 (0.6 ) a Geiges et al. IEEE Trans. Nucl. Sci. 41 (94) 232
Read-out System Read-out System Placement of the front-end boards Motherboard - daughterboard combination mounted on frames. l Daughterboard n 16 channel preamp/shaper/discriminator n Based on ASD-8 l Motherboard n 64, 96 channel version (8, 12 TDCs) n Fully memory mapped to slow control n Thresholds for ASD-8 n Common or l Interface to ROC n Differential (LVDS) n Up to 20 Mbyte/sec low power < 50 mW / channel