F28PL1 Programming Languages Lecture 4: Assembly Language 3

Not enough registers? need to use memory for: – larger data structures – temporary storage of partial values stack – partial results e.g. during arithmetic – hold state & parameters during function call must allocate & manage all other memory explicitly

Stack stack pointer == R13 == SP descending stack stack pointer – decremented on PUSH – incremented on POP – SP starts at 0x for STM32-Discovery

Stack PUSH {Rd} SP = SP-4 (*SP) = Rd i.e. decrement SP by 4 bytes == 1 word down – to next free stack location store Rd at memory address indicated by SP

Stack POP {Rd} Rd = (*SP) SP = SP+4 i.e. set Rd to contents of address indicated by SP increment SP by 4 bytes == 1 word up – next free stack location is last used

Example: swap R1 & R2 PUSH {R1} PUSH {R2} POP {R1} POP {R2} R1 R2 R130x x200001FC 0x200001F8 0x x22 0x11

Example: swap R1 & R2 R1 R2 R130x x200001FC 0x200001F8 0x200001FC 0x22 0x11 PUSH {R1} PUSH {R2} 0x11 PUSH {R1} PUSH {R2} POP {R1} POP {R2}

Example: swap R1 & R2 R1 R2 R130x x200001FC 0x200001F8 0x22 0x11 0x22 PUSH {R1} PUSH {R2} POP {R1} POP {R2}

Example: swap R1 & R2 R1 R2 R130x x200001FC 0x200001F8 0x200001FC 0x22 0x11 0x22 PUSH {R1} PUSH {R2} POP {R1} POP {R2}

Example: swap R1 & R2 R1 R2 R130x x200001FC 0x200001F8 0x x11 0x22 0x11 0x22 PUSH {R1} PUSH {R2} POP {R1} POP {R2}

Evaluation order may wish to rearrange order of evaluation to optimise register use/number of instructions exp 1 + exp 2  exp 2 + exp 1 e.g. A+B*C  B*C+A exp 1 * exp 2  exp 2 * exp 1 e.g. A*(B+C)  (B+C)*A exp 1 * exp 2 + exp 1 * exp 3  exp 1 * (exp 2 + exp 3 ) e.g. X*X+X*Y  X*(X+Y)  (X+Y)*X

Evaluation order sometimes need to preserve left to right order e.g. expression contains function calls that change shared variables int inc(int * x) { *x = *x+1; return *x; } int a; a = 2; a+inc(&a)  2+3  5 inc(&a)+a  3+3  6

Example: (a-b)/((c-d)/((e-f)/(g-h))) AREA BIGDIV, CODE ; Main __mainPROC EXPORT __main A RN 1 B RN 2 C RN 3 D RN 4 E RN 5 F RN 6 G RN 7 H RN 8 MOV A,#128 MOV B,#64 MOV C,#32 MOV D,#16 MOV E,#8 MOV F,#4 MOV G,#2 MOV H,#1 strict left to right suppose only R9 & R10 spare

Example: (a-b)/((c-d)/((e-f)/(g-h))) SUB R9,A,B R9 == A-B SUB R10,C,D R10 == C-D need register for E-F put A-B on stack PUSH {R9} *SP == A-B SUB R9,E,F R9 == E-F need register for G-H put C-D on stack PUSH {R10} *SP == C-D SUB R10,G,H R10 == G-H UDIV R9,R10 R9 == (E-F)/(G-H) R10 free get C-D from stack POP {R10} R10 == C-D UDIV R10,R9 R10 == (C-D)/((E-F)/(G-H))

Example: (a-b)/((c-d)/((e-f)/(g-h))) R9 free get A-B from stack POP {R9} R9 == A-B UDIV R9,R10 R9 == (A-B)/((C-D)/((E-F)/(G-H))) ENDLB ENDL ENDP END

Areas of memory AREA name defines section of memory may be manipulated as a unit by compiler AREA name,attribute1,...,attribute N attribute CODE == machine instructions DATA == data

Areas of memory READONLY == not writeable may be in ROM default for CODE READWRITE == writeable default for DATA

Allocating memory MAP expr set start of a storage map starting at address expr {VAR} assembler storage map location counter starts at expr e.g. MAP 0x {VAR} == 0x == start of SRAM

Allocating memory {label} FIELD expr allocate expr bytes from {VAR} label is associated with initial value of {VAR} {VAR} = {VAR} + expr e.g. X FIELD 4 X is 4 bytes from 0x {VAR} is now 0x

Memory access cannot access memory directly load register with memory address access memory indirect on register load register with absolute address using MOV LDR Rd,= label  load Rd with address corresponding to label

Memory access [ Rd ] == indirection use contents of Rd as address LDR Rt,[ Rn ]  Rt = * Rn i.e. load Rt from memory whose address is in Rn STR Rt,[ Rn ]  * Rn = Rt i.e. store Rt at memory whose address is in Rn

Example: swap a & b int x; int y; int t; x = 22; y = 33; t = x; x = y; y = t; AREA SWAP, DATA, READWRITE SRAM EQU 0x MAP SRAM XFIELD 4 YFIELD 4 TFIELD 4 0x x x T Y X

Example: swap a & b int x; int y; int t; x = 22; y = 33; t = x; x = y; y = t; AREA SWAP, CODE ; Main __mainPROC EXPORT __main LDR R1,=X LDR R2,=Y LDR R3,=T MOV R4,#22 STR R4,[R1] MOV R4,#33 STR R4,[R2] R1 R2 R30x x x R4 0x x x T Y X

Example: swap a & b int x; int y; int t; x = 22; y = 33; t = x; x = y; y = t; AREA SWAP, CODE ; Main __mainPROC EXPORT __main LDR R1,=X LDR R2,=Y LDR R3,=T MOV R4,#22 STR R4,[R1] MOV R4,#33 STR R4,[R2] R1 R2 R30x x x R4 0x x x T Y X 22

Example: swap a & b int x; int y; int t; x = 22; y = 33; t = x; x = y; y = t; AREA SWAP, CODE ; Main __mainPROC EXPORT __main LDR R1,=X LDR R2,=Y LDR R3,=T MOV R4,#22 STR R4,[R1] MOV R4,#33 STR R4,[R2] R1 R2 R30x x x R4 0x x x T Y X

Example: swap a & b int x; int y; int t; x = 22; y = 33; t = x; x = y; y = t; LDR R4,[R1] STR R4,[R3] LDR R4,[R2] STR R4,[R1] LDR R4,[R3] STR R4,[R2] ENDLB ENDL ENDP END R1 R2 R30x x x R4 0x x x T Y X

Example: swap a & b int x; int y; int t; x = 22; y = 33; t = x; x = y; y = t; LDR R4,[R1] STR R4,[R3] LDR R4,[R2] STR R4,[R1] LDR R4,[R3] STR R4,[R2] ENDLB ENDL ENDP END R1 R2 R30x x x R4 0x x x T Y X

Example: swap a & b int x; int y; int t; x = 22; y = 33; t = x; x = y; y = t; LDR R4,[R1] STR R4,[R3] LDR R4,[R2] STR R4,[R1] LDR R4,[R3] STR R4,[R2] ENDLB ENDL ENDP END R1 R2 R30x x x R4 0x x x T Y X

Example: swap a & b int x; int y; int t; x = 22; y = 33; t = x; x = y; y = t; LDR R4,[R1] STR R4,[R3] LDR R4,[R2] STR R4,[R1] LDR R4,[R3] STR R4,[R2] ENDLB ENDL ENDP END R1 R2 R30x x x R4 0x x x T Y X 33 22

Example: swap a & b int x; int y; int t; x = 22; y = 33; t = x; x = y; y = t; LDR R4,[R1] STR R4,[R3] LDR R4,[R2] STR R4,[R1] LDR R4,[R3] STR R4,[R2] ENDLB ENDL ENDP END R1 R2 R30x x x R4 0x x x T Y X

Example: swap a & b int x; int y; int t; x = 22; y = 33; t = x; x = y; y = t; LDR R4,[R1] STR R4,[R3] LDR R4,[R2] STR R4,[R1] LDR R4,[R3] STR R4,[R2] ENDLB ENDL ENDP END R1 R2 R30x x x R4 0x x x T Y X

Array space array is continuous sequence of bytes type name [ size ] allocate sizeof( type )* size bytes start register at address of 1 st byte access byte/half word/word indirect on register add 1/2/4 to register to get to address for next byte/halfword/word

Array access a[i] == address for a + i*size( type ) for iterative access to a[i] – 0 <= i <size put address of array in register Ri on each iteration – access [Ri] – add size( type ) to Ri

Example: a[i] = i #define MAX 25 int a[MAX]; int i; i = 0; while(i<MAX) { a[i] = i; i = i+1; } AREA SETA, DATA, READWRITE SRAM EQU 0x MAP SRAM MAXEQU 25 AFIELD MAX*4 A is 0x to 0x AREA SETA, CODE __mainPROC EXPORT __main

Example: a[i] = i #define MAX 25 int A[MAX]; int i; i = 0; while(i<MAX) { A[i] = i; i = i+1; } LDR R1,=A - R1 == MOV R2,#0 - R2 == i TESTCMP R2,#MAX BEQ ENDL STR R2,[R1] - (*A) = i ADD R2,#1 - i = i+1 ADD R1,#0x04 - A = A+4 B TEST ENDLB ENDL ENDP END

Example: a[i] = i LDR R1,=A MOV R2,#0 TESTCMP R2,#MAX BEQ ENDL STR R2,[R1] ADD R2,#1 ADD R1,#0x04 B TEST ENDLB ENDL ENDP END R1 R20 0x x x x a[0] a[1] a[2]

Example: a[i] = i LDR R1,=A MOV R2,#0 TESTCMP R2,#MAX BEQ ENDL STR R2,[R1] ADD R2,#1 ADD R1,#4 B TEST ENDLB ENDL ENDP END R1 R20 0x x x x a[0] a[1] a[2] 0

Example: a[i] = i LDR R1,=A MOV R2,#0 TESTCMP R2,#MAX BEQ ENDL STR R2,[R1] ADD R2,#1 ADD R1,#4 B TEST ENDLB ENDL ENDP END R1 R21 0x x x x a[0] a[1] a[2] 0

Example: a[i] = i LDR R1,=A MOV R2,#0 TESTCMP R2,#MAX BEQ ENDL STR R2,[R1] ADD R2,#1 ADD R1,#4 B TEST ENDLB ENDL ENDP END R1 R21 0x x x x a[0] a[1] a[2] 0

Example: a[i] = i LDR R1,=A MOV R2,#0 TESTCMP R2,#MAX BEQ ENDL STR R2,[R1] ADD R2,#1 ADD R1,#4 B TEST ENDLB ENDL ENDP END R1 R21 0x x x x a[0] a[1] a[2] 1 0

Example: a[i] = i LDR R1,=A MOV R2,#0 TESTCMP R2,#MAX BEQ ENDL STR R2,[R1] ADD R2,#1 ADD R1,#4 B TEST ENDLB ENDL ENDP END R1 R22 0x x x x a[0] a[1] a[2] 1 0

Example: a[i] = i LDR R1,=A MOV R2,#0 TESTCMP R2,#MAX BEQ ENDL STR R2,[R1] ADD R2,#1 ADD R1,#4 B TEST ENDLB ENDL ENDP END R1 R22 0x x x a[0] a[1] a[2] 1 0

Example: a[i] = i LDR R1,=A MOV R2,#0 TESTCMP R2,#MAX BEQ ENDL STR R2,[R1] ADD R2,#1 ADD R1,#4 B TEST ENDLB ENDL ENDP END R1 R22 0x x x a[0] a[1] a[2] 1 0 2

Example: a[i] = i LDR R1,=A MOV R2,#0 TESTCMP R2,#MAX BEQ ENDL STR R2,[R1] ADD R2,#1 ADD R1,#4 B TEST ENDLB ENDL ENDP END R1 R23 0x x x a[0] a[1] a[2] 1 0 2

Example: a[i] = i LDR R1,=A MOV R2,#0 TESTCMP R2,#MAX BEQ ENDL STR R2,[R1] ADD R2,#1 ADD R1,#4 B TEST ENDLB ENDL ENDP END R1 R23 0x C 0x x x a[0] a[1] a[2] 1 0 2