Uli Schäfer 1 Ethernet-driven control and data acquisition scheme for the Timepix-based TPC readout R. Degele, C. Kahra, U. Schäfer, M.Zamrowski Univ.

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Uli Schäfer 1 Ethernet-driven control and data acquisition scheme for the Timepix-based TPC readout C. Kahra, U. Schäfer, M.Zamrowski Uni Mainz.

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Presentation transcript:

Uli Schäfer 1 Ethernet-driven control and data acquisition scheme for the Timepix-based TPC readout R. Degele, C. Kahra, U. Schäfer, M.Zamrowski Univ. Mainz

Uli Schäfer 2 TPC readout chain TPC to be read out by one or several pixel sensors (256*256 pixels) Timepix chip bonded on a FR4 carrier Amplifier Discriminator TDC TOT Common stop Serialiser (LVDS link) Flat cable connection (ZIF) to adapter board Trigger, test pulse, voltage monitor Flat cable connection to Xilinx ML506 evaluation board FPGA Virtex-5 (XC5VSX50-TFFG1136) Deserialiser Buffer Ethernet / IP packet engine (UDP)

Uli Schäfer 3 TPC readout chain TIMEPIX- ADAPTER- BOARD ML506 ETHERNET Timepix chip GEM Ionizing particles cathode

Uli Schäfer 4 Adapter board Testpulse generator ADC 4-Channel 24-Bit Voltage Reference 2V5 Connector to Xilinx ML506 Trigger RJ45 (TLU) ID -NUMBER TRIGGER, BUSY, RESET, DATA CLOCK control DAC-OUT TEST_IN 3V 3V, 5V 5V S/N 2V2 7V CONTROL, CLK, ADDRESS Power supply DAC-OUT DIGITAL TIMEPIX-CONTROL TIMEPIX-DATA (LVDS) TP_IN Connector to Timepix

Uli Schäfer 5 Timepix 55µm 20µm 10µm Pixel cell