CAD Computer Aided Design Doru Todinca Course web page: in Teaching,

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Presentation transcript:

CAD Computer Aided Design Doru Todinca Course web page: in Teaching, CAD, Or:

Structure of the course 2 hours lectures, 2 hours lab per week Final grade: 50% lab, 50% written exam The lab is mandatory Web page:

Assignments We will focus on two projects/assignments: –VHDL modeling of a hardware system –Modeling a telecommunication system using the OMNeT++ network simulator One of the assignments is mandatory and will ensure the grade for the lab The other assignment can provide bonus points for the written exam, and even to replace the exam !

CAD: Motivation We will learn new techniques for modelling and simulation We will write computer programs (more precisely, models) that deal with: –Simulation time, the structure of the model, behavior of each module, concurrency, events… The goals of the course: to perform computer aided design of: 1.Hardware systems 2.Telecommunication systems

First goal: designing hardware systems Lectures: teaching the VHDL language: –Simulation mechanism –Behavioral modelling –Structural modelling (less than in previous years) –Circuits: registers, MUX-es, finite state machines (FSM), etc Labs: –VHDL modelling and simulation of a design from previous years: Booth or Robertson multiplier, other arithmetic devices, or a μP or μC Or of a new design: fuzzy logic controller (FLC),… –For more details see the webpage

Second goal: telecom systems Lectures: –Quality of Service (QoS) and QoS differentiation in Internet Architectures for QoS in Internet: Integrated services (IntServ), Differentiated services (DiffServ) Techniques: scheduling, admission control, routing, congestion control, queue management, etc. –Mobile communications: basics, LTE (4G), 5G Labs: –Learning the OMNeT++ network simulator: open source network simulator based in C++ –OMNeT++ model of a part of a DiffServ architecture, or of a part of a mobile system –Collection and interpretation of the simulation results

Why VHDL ? VHDL is a representative hardware description language (HDL) It is a standard language (IEEE ) It contains features specific to HDLs: –Simulation mechanism, simulation time, processes, structural descriptions, configurations, etc. It has capabilities specific to high-level programming languages: –IF, CASE, LOOP statements, subprograms, etc.

Why OMNeT++ ? There are many network simulators: –Commercial: OPNET, SES/Workbench –Non-commercial: ns2, ns3, … OMNeT++ is a free (non-commercial) open-source network simulator It is easy to learn and to use: –It is based on C/C++ for behavioral modeling –Uses predefined functions that model modules’ behavior (handleMessage, activity, finish, initialize)

Why OMNeT++ ? (cont’d) Can be easily used for high-level modelling Has also frameworks for more detailed modelling of IP systems, mobile ad-hoc networks, etc Good graphical interface Capabilities for displaying and processing simulation results, etc. Examples, tutorial, user manual…

References [EKP98] Petru Eles, Krzysztof Kuchcinski, Zebo Peng, “System Synthesis with VHDL”, Kluwer Academic Publishers, 1998 (chapter 2, mostly for behavioural modelling) [Bha95] J. Bhasker, “A VHDL Primer”, Prentice Hall, 1995 [Ash] P. Ashenden, “VHDL Cookbook”, www… -mostly for assignments [Omn10] OMNeT++ User Manual, Version 4.1. Andras Varga and OpenSim Ltd, [Online]. Available: [Sta07] William Stallings, Data and Computer Communications, Eight Edition, Pearson Prentice Hall, 2007 (for DiffServ) Power Point slides

Sources The VHDL part of the lectures is based on [EKP98] (for behavioral modelling and dataflow modeling, except BLOCKs, and [Bha95] for BLOCKS, structural modelling, advanced topics) in the sense that the CAD lectures contain ideas, figures and text from [EKP98] and [Bha95] respectively. When other sources are used, it will be mentioned. The Omnet part is based mainly on [Omn10], meaning that it contains ideas, text and images from [Omn10], when not stated otherwise.