Channel Interleaver for Convolutional Turbo Code Document Number: IEEE C802.16m-09/0141 Date Submitted: Source: CiouPing Wu Peikai Liao Yu-Hao Chang YihShen Chen and Paul Cheng MediaTek Inc. No. 1 Dusing Rd. 1 Hsinchu Science Park Hsinchu City 300 Taiwan. Venue: SDD: section FEC Encoding In response to IEEE m-08/052 “Call for Comments on Project m SDD”. Base Contribution: This is base contribution. Purpose: Propose to be discussed and adopted by TGm for the use in Project m SDD. Notice: This document does not represent the agreed views of the IEEE Working Group or any of its subgroups. It represents only the views of the participants listed in the “Source(s)” field above. It is offered as a basis for discussion. It is not binding on the contributor(s), who reserve(s) the right to add, amend or withdraw material contained herein. Release: The contributor grants a free, irrevocable license to the IEEE to incorporate material contained in this contribution, and any modifications thereof, in the creation of an IEEE Standards publication; to copyright in the IEEE’s name any IEEE Standards publication even though it may include portions of this contribution; and at the IEEE’s sole discretion to permit others to reproduce in whole or in part the resulting IEEE Standards publication. The contributor also acknowledges and accepts that this contribution may be made public by IEEE Patent Policy: The contributor is familiar with the IEEE-SA Patent Policy and Procedures: and. Further information is located at and.

Introduction In SDD, the FEC encoder used in IEEE m includes CTC (convolutional turbo code) of code rate 1/3 defined in the IEEE e[1] standard and the channel interleavers. Channel interleaving is employed to average the burst channel errors over one data package so as to improve performance. The channel interleaver design in OFDM system should meet the following two conditions: –Frequency diversity gain: When frequency domain mapping is considered, adjacent bits should be allocated to nonconsecutive subcarriers so as to maximize the exploited frequency diversity gain –Constellation diversity gain: When symbol constellation mapping is considered, adjacent bits should be be allocated onto different bit locations within symbols

Interleaver of IEEE802.16e Convolutional Turbo code(1/2) Channel interleaver for convolutional turbo code (CTC) used in IEEE e[1]

Interleaver of IEEE e Convolutional Turbo Code(2/2) In IEEE e, the channel interleaver includes: –Symbol separation Sequentially distribute all encoded bits into six subblocks Subblocks A and B are information blocks Subblocks Y1 and Y2 are the parity blocks generated by the first convolutional encoder of CTC Subblocks W1 and W2 are the parity blocks generated by the second convolutional encoder of CTC –Subblock interleaving The six subblocks are interleaved independently The behavior of subblock interleaver can be described by the mathematical formula, which is a function of block size, m and J. For example, a tentative output address T k in e is given as If the tentative output address T k is greater than N or equal to N, the tentative output address T k is discarded, where N = ½ * (the number of the information bits in a coded block) –symbol grouping A and B are block-wise interleaved Y1, Y2, W1 and W2 are bit-wise interleaved

Issues with IEEE802.16e subblock interleaver (1/2) Example: 16QAM, data_len = 48 bytes, code_rate = ½ –Based on the previous output address formula T k, the read address of subblocks A and B are shown as In 16QAM constellation, –Blue indexing bits are mapped onto the bit positions with higher level of robustness –Black indexing bits are mapped onto the bit positions with lower level of robustness

Issues with IEEE802.16e subblock interleaver (2/2) Observation: If we reorder the bit in the previous address table according to its indices from low to high as shown in the below figure, we find that e subblock interleaver will map contiguous bits onto the bit location with the same level of robustness in 16 QAM constellation Issue #1: Contiguous coded bits are mapped onto the bit location with the same level of robustness in the symbol constellation This kind of design fails to combat the channel burst error due to the lack of constellation diversity

Issues with IEEE802.16e symbol grouping Symbol grouping for Y1, Y2, W1 and W2 are illustrated as below Issue #2: When 16 QAM is considered, subblock Y1 (W1) and Y2 (W2) are mapped onto more and less robust bit location, respectively This design may not combat burst error efficiently

Proposed Channel interleaver(1/2) In order to obtain frequency and constellation diversity gain, we propose a modified version of subblock interleaving and symbol grouping for channel interleaver:

Proposed Channel interleaver(2/2) –The proposed subblock interleaving includes Tentative address generator: –Produce a tentative address A i which maps adjacent coded bits onto nonconsecutive subcarriers –The behavior of tentative address generator is the same as the subblock interleaving used in IEEE e Constellation-based address generator: –Produce a read address C i which can insure that the adjacent coded bits are mapped alternatively onto bit location with different levels of robustness in the constellation –The behavior of the constellation-based address generator is described in following slides –The proposed symbol grouping: Multiplex the coded bits which are in six subblocks The proposed symbol grouping can ensure that not all the parity check bits in one subblock are mapped onto either more or less robust bit position.

Proposed Constellation-based address generator Goal : Interleave the tentative address to generate the read address which can alternatively map the adjacent coded bits onto less or more robust bits –16 QAM Divide the whole tentative addresses A i into two separated parts and then perform one circular shift to the left on the second group by one read address –64 QAM Step1(grouping): Divide the whole tentative addresses A i into three groups of the same size. Step2(1 st shifting): Perform one circular shift along the left or right direction on the second group by one tentative address Step3(2 nd shifting): Perform one circular shift along the same direction in step 2 on the last group by two tentative addresses

Proposed symbol grouping scheme Goal –Change the bit multiplex order of subblocks Y and W so that not all the parity check bits in one subblock are mapped onto either more or less robust bit position Approach –Step 1(partition): The coded bits are divided into couples of units, each of which is with s contiguous bits where s = ½*(the number of the bits per modulated symbol) –Step 2(unit-wised multiplexing): The parity check subblocks are unit-by-unit multiplexed 16QAM (s = 2) 64QAM (s= 3)

Simulation environment ParametersAssumptions Subcarrier spacing kHz FFT size1024 CP configuration1/8Tu (=11.42us) Permutation (Subchannelization)PUSC Number of Tx/Rx antennas2Tx-2Rx Channel modelVehA 30km/h Modulation and coding rateQPSK 1/12 and 1/16 Channel codingConvolutional turbo code Channel estimationPerfect Receiver structureMMSE Multi-antenna transmission formatSpatial multiplexing

Simulation Result(1/2) Proposed A channel interleaver: Only insert the constellation-based address generator in the channel interleaver used in e Simulation parameters: –Modulation order :16QAM –Code rate : ½ –Data block size (bytes):48 bytes –Channel : AWGN

Simulation Result(1/2) Simulation parameters: –Modulation order :16QAM –Code rate : ½ –Data block size (bytes):48 bytes

Simulation Result(2/2) Simulation parameters: –Modulation order :64QAM –Code rate : ½ –Data block size (bytes) : 72 bytes

Conclusion In AWGN: –The proposed A channel interleaver performs better than original channel interleaver Alternatively mapping the adjacent coded bits onto different bit locations within symbols in the constellation can exploit the constellation diversity gain –The proposed channel interleaving performs better than the channel interleaving used in 16e and the proposed A channel interleaver in high SNR region Alternatively mapping the coded bits which are in the whole subblock onto more or less robust bits locations will increase the performance of the convolutional turbo code. In fadding channel: –16QAM : the performance of proposed channel interleaver is much better than original channel interleaver. –64QAM : the performance of proposed channel interleaver is better than original channel interleaver 2dB more or less with target BLER = (576,1/2,64QAM) The channel interleaver design in OFDM system should meet the following two considerations: –Adjacent bits are allocated to nonconsecutive subcarriers –Adjacent bits are allocated onto different bit locations within symbols

Proposed text on IEEE m-08/003r6 [Adopt the following modified text starting from line#16, page#123 in IEEE m-08/003r6[2]] … The encoder block depicted in Figure 53 includes sub-block interleavers. The interleaving design should insure that the adjacent coded bits are mapped onto nonadjacent subcarriers and they are alternatively mapped onto less or more robust bits of the symbol constellation. The interleaving details are FFS.

Reference [1]IEEE P Rev2 / D7, “Draft IEEE Standard for Local and Metropolitan Area Networks: Air Interface for Broadband Wireless Access,” Oct [2]IEEE m-08/003r6, “The Draft IEEE m System Description Document”