Copyright 2005, Agrawal & BushnellLecture 11: Analog Test1 VLSI Testing Lecture 11: Analog Test Dr. Vishwani D. Agrawal James J. Danaher Professor of Electrical and Computer Engineering Auburn University, Alabama 36849, USA IIT Delhi, Aug 24, 2013, 10:00-11:00AM

Copyright 2005, Agrawal & BushnellLecture 11: Analog Test2 Contents  Analog circuits  Analog circuit test methods  Specification-based testing  Direct measurement  DSP-based testing  Fault model based testing  IEEE analog test bus standard  Summary  References

Copyright 2005, Agrawal & BushnellLecture 11: Analog Test3 Analog Circuits  Operational amplifier (analog)  Programmable gain amplifier (mixed-signal)  Filters, active and passive (analog)  Comparator (mixed-signal)  Voltage regulator (analog or mixed-signal)  Analog mixer (analog)  Analog switches (analog)  Analog to digital converter (mixed-signal)  Digital to analog converter (mixed-signal)  Phase locked loop (PLL) (mixed-signal)

Copyright 2005, Agrawal & BushnellLecture 11: Analog Test4 Test Parameters  DC  Continuity  Leakage current  Reference voltage  Impedance  Gain  Power supply – sensitivity, common mode rejection  AC  Gain – frequency and phase response  Distortion – harmonic, intermodulation, nonlinearity, crosstalk  Noise – SNR, noise figure

Copyright 2005, Agrawal & BushnellLecture 11: Analog Test5 Filter Analog Test (Traditional) Analog device under test (DUT) ~ DC ETC. DC RMS PEAK ETC. StimulusResponse

Copyright 2005, Agrawal & BushnellLecture 11: Analog Test6 DSP-Based Mixed-Signal Test Mixed-signal device under test (DUT) A/DRAM D/A Send memory Receive memory Analog Digital Synchronization Digital signal processor (DSP) Vectors SynthesizerDigitizer

Copyright 2005, Agrawal & BushnellLecture 11: Analog Test7 Waveform Synthesizer © 1987 IEEE

Copyright 2005, Agrawal & BushnellLecture 11: Analog Test8 Waveform Digitizer © 1987 IEEE

Copyright 2005, Agrawal & BushnellLecture 11: Analog Test9 Circuit Specification Key Performance Specifications: TLC7524C 8-bit Multiplying Digital-to-Analog Converter Resolution8 Bits Linearity error½ LSB Max Power dissipation at V DD = 5 V5 mW Max Settling time100 ns Max Propagation delay time80 ns Max

Copyright 2005, Agrawal & BushnellLecture 11: Analog Test10 Voltage Mode Operation Data Latches VOVO CS WR RRR R 2R DB7 (MSB) DB6DB5DB0 (LSB) GND R FB OUT1 OUT2 Data Inputs VIVI REF V O = V I (D/256) VDD = 5 V OUT1 = 2.5 V OUT2 = GND

Copyright 2005, Agrawal & BushnellLecture 11: Analog Test11 Operational/Timing Spec. ParameterTest conditionsFor VDD = 5 V Linearity error ±0.5 LSB Gain error Measured using the internal feedback resistor. Normal full scale range (FSR) = Vref – 1 LSB ±2.5 LSB Settling time to ½ LSBOUT1 load = 100 Ω, Cext = 13 pF, etc. 100 ns Prop. Delay, digital input to 90% final output current 80 ns CS WR DB0-DB7 t su (CS) ≥ 40 ns t h (CS) ≥ 0 ns t w (WR) ≥ 40 ns t su (D) ≥ 25 ns t h (D) ≥ 10 ns

Copyright 2005, Agrawal & BushnellLecture 11: Analog Test12 Operating Range Spec. Supply voltage, V DD -0.3 V to 16.5 V Digital input voltage range-0.3 V to V DD +0.3 V Reference voltage, V ref ±25 V Peak digital input current10μA Operating temperature-25ºC to 85ºC Storage temperature-65ºC to 150ºC Case temperature for 10 s260ºC

Copyright 2005, Agrawal & BushnellLecture 11: Analog Test13 Test Plan: Hardware Setup DACOUT 2.5 V +Full-scale code R LOAD 1 kΩ + V out - Vref D7-D0 VM +-+-

Copyright 2005, Agrawal & BushnellLecture 11: Analog Test14 Test Program Pseudocode dac_full_scale_voltage() { set VI1 = 2.5 V; /* Set the DAC voltage reference to 2.5 V */ start digital pattern = “dac_full_scale”; /* Set DAC output to +full scale (2.5 V) */ connect meter: DAC_OUT /* Connect voltmeter to DAC output */ fsout = read_meter(), /* Read voltage level at DAC_OUT pin */ test fsout; /* Compare the DAC full scale output to data sheet limit */ }

Copyright 2005, Agrawal & BushnellLecture 11: Analog Test15 Analog Fault Models A 1 First stage gainR 2 / R 1 A 2 High-pass filter gainR 3 and C 1 f C1 High-pass filter cutoff frequency C 1 and R 3 A 3 Low-pass AC voltage gainR 4, R 5 and C 2 A 4 Low-pass DC voltage gainR 4 and R 5 f C2 Low-pass filter cutoff frequencyC 2 and R 5 Op Amp High-pass filter Low-pass filter amplifier

Copyright 2005, Agrawal & BushnellLecture 11: Analog Test16 Bipartite Graph of Circuit Minimum set of parameters to be observed

Copyright 2005, Agrawal & BushnellLecture 11: Analog Test17 Method of ATPG Using Sensitivities  Compute analog circuit sensitivities  Construct analog circuit bipartite graph  From graph, find which O/P parameters (performances) to measure to guarantee maximal coverage of parametric faults  Determine which O/P parameters are most sensitive to which component faults  Evaluate test quality, add test points to complete the analog fault coverage N. B. Hamida and B. Kaminska, “Analog Circuit Testing Based on Sensitivity Computation and New Circuit Modeling,” Proc. ITC-1993.

Sensitivity  Sensitivity of a circuit parameter y with respect to variation in a component value x is, S(x,y) = (∆y/y)/(∆x/x)where ∆x is small  For our example, a parameter y can be gain or cutoff frequency and components are resistors and capacitors. Copyright 2005, Agrawal & BushnellLecture 11: Analog Test18

Copyright 2005, Agrawal & BushnellLecture 11: Analog Test19 Finding Sensitivity  Simulate the circuit with all components at nominal values.  Determine sensitivity of one parameter- component pair at a time:  Find the minimum component value deviation, positive or negative, such that a measurable performance parameter deviation is produced.  Repeat for all parameter-component pairs.

Copyright 2005, Agrawal & BushnellLecture 11: Analog Test20 Sensitivity Matrix of Circuit R R R C R R R C 2 A 1 A 2 fc 1 A 3 A 4 fc 2 Numbers in orange show highest sensitivity for a component.

Tolerance  Tolerance of a parameter y with respect to variation in a component value x is, Range A ≤ ∆x/x ≤ B such that y remains within specification. All other components are assumed to have nominal values. Copyright 2005, Agrawal & BushnellLecture 11: Analog Test21

Copyright 2005, Agrawal & BushnellLecture 11: Analog Test22 Tolerance Box: Single- Parameter Variation A1A2A4A1A2A4 5% ≤ ≤ 15.98% 5% ≤ ≤ 14.10% 5% ≤ ≤ 20.27% 5% ≤ ≤ 11.60% 5% ≤ ≤ 15.00% ΔR1R1ΔR2R2ΔR3R3ΔC1C1ΔR4R4ΔR5R5ΔR1R1ΔR2R2ΔR3R3ΔC1C1ΔR4R4ΔR5R5 fC1fC2A3fC1fC2A3 5% ≤≤ 14.81% 5% ≤≤ 15.20% 5% ≤≤ 14.65% 5% ≤≤ 13.96% 5% ≤≤ 15.00% 5% ≤≤ 35.00% ΔR3R3ΔC1C1ΔR5R5ΔC2C2ΔR4R4ΔR5R5ΔC2C2ΔR3R3ΔC1C1ΔR5R5ΔC2C2ΔR4R4ΔR5R5ΔC2C2

Copyright 2005, Agrawal & BushnellLecture 11: Analog Test23 Weighted Bipartite Graph Five tests provide most sensitive measurement of all components

Copyright 2005, Agrawal & BushnellLecture 11: Analog Test24 Summary  DSP-based tester has:  Waveform synthesizer  Waveform digitizer  High frequency clock with dividers for synchronization  Analog test methods  Specification-based functional testing  Model-based analog testing  Analog test bus allows static analog tests of mixed-signal devices  Boundary scan is a prerequisite

Copyright 2005, Agrawal & BushnellLecture 11: Analog Test25 References on Analog Test  A. Afshar, Principles of Semiconductor Network Testing, Boston: Butterworth-Heinemann,  M. Burns and G. Roberts, Introduction to Mixed-Signal IC Test and Measurement, New York: Oxford University Press,  M. L. Bushnell and V. D. Agrawal, Essentials of Electronic Testing for Digital, Memory and Mixed-Signal VLSI Circuits, Boston: Springer,  R. W. Liu, editor, Testing and Diagnosis of Analog Circuits and Systems, New York: Van Nostrand Reinhold,  M. Mahoney, DSP-Based Testing of Analog and Mixed-Signal Circuits, Los Alamitos, California: IEEE Computer Society Press,  A. Osseiran, Analog and Mixed-Signal Boundary Scan, Boston: Springer,  T. Ozawa, editor, Analog Methods for Computer-Aided Circuit Analysis and Diagnosis, New York: Marcel Dekker,  B. Vinnakota, editor, Analog and Mixed-Signal Test, Upper Saddle River, New Jersey: Prentice-Hall PTR, 1998.