YCbCr 4:2:2 with Embedded Syncs In / RGB Graphics Out Using an SDTV Generic Setup CSC Setup for HD YCbCr to RGB REG 0x04 = 0x81 // csc_ric1 0x05 = 0xD5 // csc_rfc1 0x06 = 0x00 // csc_ric2 0x07 = 0x00 // csc_rfc2 0x08 = 0x06 // csc_ric3 0x09 = 0x29 // csc_rfc3 0x0A = 0x04 // csc_gic1 0x0B = 0x00 // csc_gfc1 0x0C = 0x04 // csc_gic2 0x0D = 0x00 // csc_gfc2 0x0E = 0x04 // csc_gic3 0x0F = 0x00 // csc_gfc3 0x10 = 0x80 // csc_bic1 0x11 = 0xBB // csc_bfc1 0x12 = 0x07 // csc_bic2 0x13 = 0x42 // csc_bfc2 0x14 = 0x00 // csc_bic3 0x15 = 0x00 // csc_bfc3 0x16 = 0x14 // csc_offset1 0x17 = 0xAE // csc_offset12 0x18 = 0x8B // csc_offset23 0x19 = 0x15 // csc_offset3 CSM Setup to MAP 601 scaling to Full-scale DAC Outputs 0x41 = 0x40 // csm_clip_gy_low 0x42 = 0x40 // csm_clip_bcb_low 0x43 = 0x40 // csm_clip_rcr_low 0x44 = 0x53 // csm_clip_gy_high 0x45 = 0x3F // csm_clip_bcb_high 0x46 = 0x3F // csm_clip_rcr_high 0x47 = 0x40 // csm_shift_gy 0x48 = 0x40 // csm_shift_bcb 0x49 = 0x40 // csm_shift_rcr 0x4A = 0xFC // csm_mult_gy_msb 0x4B = 0x44 // csm_mult_bcb_rcr_msb 0x4C = 0xAC // csm_mult_gy_lsb 0x4D = 0x91 // csm_mult_bcb_lsb 0x4E = 0x91 // csm_mult_rcr_lsb 0x4F = 0xFF // csm_mode Sync Amplitude Settings for no Sync-on-Green 0x1D = 0x00 // dtg_y_sync1 0x1E = 0x00 // dtg_y_sync2 0x1F = 0x00 // dtg_y_sync3 0x20 = 0x00 // dtg_cbcr_sync1 0x21 = 0x00 // dtg_cbcr_sync2 0x22 = 0x00 // dtg_cbcr_sync3 0x23 = 0x2A // dtg_y_sync_upper 0x24 = 0x00 // dtg_cbcr_sync_upper Operating Mode and Input Format 0x1C = 0x53 // dman_cntl 4:2:2 0x36 = 0x00 // dtg_linecnt_msb 0x38 = 0x89 // dtg_mode = Generic SDTV These settings can be used for all graphics formats for HD YCbCr 4:2:2 to RGB conversion. Output Sync Delays 0x71 = 0x00 // dtg_hdly_msb 0x72 = 0x01 // dtg_hdly_lsb 0x74 = 0x00 // dtg_vdly_msb 0x75 = 0x01 // dtg_vdly_lsb 0x76 = 0x00 // dtg_vlength2_lsb 0x77 = 0x07 // dtg_vdly2_msb 0x78 = 0xFF // dtg_vdly2_lsb Generic Line types 0x68 = 0x00 // BP1 Line type = active video 0x69 = 0x00 // BP2 Line type = active video

YCbCr 4:2:2 with Embedded Syncs In / RGB Graphics Out Using an SDTV Generic Setup I2C REG VGA 60Hz SVGA 60Hz XGA 60Hz SXGA 60Hz 03h11h01h CLK and Freq range 25h60h80h88h70hDtg1_spec_a (HS width) 28h90hD8h28h68hDtg1_spec_d (HS+Hor Bp) 2Bh00h 80h Dtg1_spec_d_msb 2Ch00h Dtg1_spec_h_msb 2Fh10h28h18h30hDtg1_spec_k_lsb (Hor Fp) 30h00h Dtg1_spec_k_msb 34h03h04h05h06hTotal Pixels 35h20h 40h98hper Line 39h22h 33h44hTotal Lines 3Ah0Dh74h26h2Ah per Frame 3Bh0Dh74h26h2Ahand Field 50h02h 03h04hBP1 and BP2 MSB (BP2= Total lines +1) 58h00h BP1 LSB 59h0Eh75h27h2BhBP2 LSB 70h60h80h88h70hHSOUT Width 73h03h05h07h04hVSOUT Width 79h00h Dtg_hs_in_dly_msb 7Ah39h51h41h59hDtg_hs_in_dly_lsb (41 +Horizontal Fp) 7Bh00h Dtg_vs_in_dly_msb 7Ch0Ah01h03h01hDtg_vs_in_dly_lsb (vertical Fp of the format) 82h23h3Bh23h3BhEmbedded syncs and Sync Polarities VGA 60Hz SVGA 60Hz XGA 60Hz SXGA 60Hz Total Pixels Total Lines Active Pixels Active Lines NPNPHS Polarity HS Width NPNPVS Polarity 2463VS Width CLKIN (MHz) Horizontal Fp Horizontal Bp 10131Vertical Fp Vertical Bp From the DMT VESA Standard These settings change for various formats. HSOUT and VSOUT polarities and widths must be set correctly to be displayed properly. Required dtg_hs_in and vs_in_dly settings depend on the source embedded sync alignment with RGB data. If embedded syncs are aligned with the start of the front porch, dtg_hs_in_dly can be set based on the front porch. With this configuration, a constant delay of 41 needs to be added to the horizontal Fp when calculating dtg_hs_in_dly.