Five Components of Computers Input Output Memory Control Datapath Processor.

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Presentation transcript:

Five Components of Computers Input Output Memory Control Datapath Processor

Input / Output Technology Human input interface Data Rate (Mbit/sec)* Keyboard Mouse Speech * I/O data rates are usually given in base 10 K = 1,000 and M = 1,000,000 instead of base 2 like memory and some transfer rates K = 1,024 and M = 1,024 x 1,024

Human output interface Data Rate (Mbits/sec) Printer Image: laser printer, ink jet printer3.2 Audio sounds, music, speech8.0 Display High Resolution Color Graphics Display Input / Output Technology

Data Storage Data Rate ( Mbits/sec) Optical Disks Magnetic Tapes5-120 Hard Disks

Input / Output Technology Communications Data Rate ( Mbits/sec) Modem Network / LAN100-10,000

Input / Output Technology Extremely Diverse Response times Data rates Size of blocks of data

Input / Output Technology Extremely Diverse Response times Data rates Size of blocks of data Requires Flexibility of Configuration Unknown I/O may be added Requires expandability

Input / Output Technology Extremely Diverse Response times Data rates Size of blocks of data Requires Flexibility of Configuration Unknown I/O may be added Requires expandability Most Require Critical Timing Sustain data rates Acceptable response time

How can we connect I/O to the computer ?

Dedicated Register ( I/O port) for each device I/O Register

How can we connect I/O to the computer ? Dedicated Register ( I/O port) for each device I/O Register Special instructions to transfer data in and out of the register

How can we connect I/O to the computer ? Dedicated Register ( I/O port) for each device I/O Register Special instructions to transfer data in and out of the register I/O device transfers data in and out of the register

How can we connect I/O to the computer ? Dedicated Register ( I/O port) for each device I/O Register Special instructions to transfer data in and out of the register I/O device transfers data in and out of the register Need control protocol and some control means

How can we connect I/O to the computer ? A Bus - A shared communication link

How can we connect I/O to the computer ? A Bus - A shared communication link Examples Register File Bus Memory Bus

How can we connect I/O to the computer ? A Bus - A shared communication link Examples Register File Bus Memory Bus Shared Data and Address and Control lines ( wires) by many I/O controllers/devices

How can we connect I/O to the computer ? A Bus - A shared communication link Examples Register File Bus Memory Bus Shared Data and Address and Control lines ( wires) by many I/O controllers/devices Expandability, Expandability, Expandability

How can we connect I/O to the computer ? A Bus - A shared communication link Examples Register File Bus Memory Bus Shared Data and Address and Control lines ( wires) by many I/O controllers/devices Expandability, Expandability, Expandability Standard I/O bus interfaces enable third party development

CPU/ Memory Control Data I/O 1 I/O 2 I/O 3 I/O bus

CPU/ Memory Control Data I/O 1 I/O 2 I/O 3 I/O bus Typical bus transaction 1. CPU initiates a transfer with a selected I/O using Control

CPU/ Memory Control Data I/O 1 I/O 2 I/O 3 I/O bus Typical bus transaction 1.CPU initiates a transfer with a selected I/O using Control 2.The Address is sent using Data ( Multiplexed)

CPU/ Memory Control Data I/O 1 I/O 2 I/O 3 I/O bus Typical bus transaction 1.CPU initiates a transfer with a selected I/O using Control 2.The Address is sent using Data ( Multiplexed) 3.The data is sent / received using Data

CPU/ Memory Control Data I/O 1 I/O 2 I/O 3 I/O bus Typical bus transaction 1.CPU initiates a transfer with a selected I/O using Control 2.The Address is sent using Data ( Multiplexed) 3.The data is sent / received using Data Control lines control the timing, starting and completion

Processor Memory Processor Memory bus I/O Device

Connecting to CPU / Memory 1.The processor- memory bus I/O conforms to the memory controls ( Memory Mapped)

Connecting to CPU / Memory 1.The processor- memory bus I/O conforms to the memory controls Fastest bandwidth – Direct to CPU

Connecting to CPU / Memory 1.The processor- memory bus I/O conforms to the memory controls Fastest bandwidth – Direct to CPU Very restricted length – few inches

Connecting to CPU / Memory 1.The processor- memory bus I/O conforms to the memory controls Fastest bandwidth – Direct to CPU Very restricted length – few inches Loading and noise are major problems

Connecting to CPU / Memory 1.The processor- memory bus I/O conforms to the memory controls Fastest bandwidth – Direct to CPU Very restricted length – few inches Loading and noise are major problems Processor & Memory design specific

Processor Memory Processor-memory bus I/O Device Bus Adapter I/O Device I/O Device Expansion bus

Connecting to CPU / Memory 1.The processor - memory bus 2.Backplane bus or Expansion bus Plug in Device Controller Card

Connecting to CPU / Memory 1.The processor - memory bus 2.Backplane bus or Expansion bus Plug in Device Controller Card Standard Spec’s (PCI, PCMCIA)

Connecting to CPU / Memory 1.The processor - memory bus 2.Backplane bus or Expansion bus Plug in Device Controller Card Standard Spec’s (PCI, PCMCIA) Bus adapter to processor - memory bus

Connecting to CPU / Memory 1.The processor - memory bus 2.Backplane bus or Expansion bus Plug in Device Controller Card Standard Spec’s (PCI, PCMCIA) Bus adapter to processor - memory bus Length of several inches

Connecting to CPU / Memory 1.The processor - memory bus 2.Backplane bus or Expansion bus Plug in Device Controller Card Standard Spec’s (PCI, PCMCIA) Bus adapter to processor - memory bus Length of several inches Can be different clock rate

Processor Memory Processor-memory bus I/O Device Bus Adapter I/O Device I/O Device Bus Adapter I/O Device I/O Device Expansion bus I/O Bus

Connecting to CPU / Memory 1.The processor - memory bus 2.Backplane bus or Expansion bus 3.I/O bus Standard intelligent controller and interface

Connecting to CPU / Memory 1.The processor - memory bus 2.Backplane bus or Expansion bus 3.I/O bus Standard intelligent controller and interface SCSI (parallel / serial) and USB ( serial)

Connecting to CPU / Memory 1.The processor - memory bus 2.Backplane bus or Expansion bus 3.I/O bus Standard intelligent controller and interface SCSI (parallel / serial) and USB ( serial) Simple low level interface

Connecting to CPU / Memory 1.The processor - memory bus 2.Backplane bus or Expansion bus 3.I/O bus Standard intelligent controller and interface SCSI (parallel / serial) and USB ( serial) Simple low level interface Typically connects to Expansion bus

Connecting to CPU / Memory 1.The processor - memory bus 2.Backplane bus or Expansion bus 3.I/O bus Standard intelligent controller and interface SCSI (parallel / serial) and USB ( serial) Simple low level interface Typically connects to Expansion bus Length of several feet

Connecting to CPU / Memory 1.The processor - memory bus 2.Backplane bus or Expansion bus 3.I/O bus Standard intelligent controller and interface SCSI (parallel / serial) and USB ( serial) Simple low level interface Typically connects to Expansion bus Length of several feet May enable stand-alone device to device transfers

Processor Memory Processor-memory bus I/O Device Bus Adapter I/O Device I/O Device Bus Adapter I/O Device I/O Device Expansion bus I/O Bus

I/O Bus Examples FirewireUSB 2.0PCI ExpressSerial ATASerial Attached SCSI Intended useExternal Internal External Devices per channel Data width422/lane44 Peak bandwidth 50MB/s or 100MB/s 0.2MB/s, 1.5MB/s, or 60MB/s 250MB/s/lane 1×, 2×, 4×, 8×, 16×, 32× 300MB/s Hot pluggable Yes DependsYes Max length4.5m5m0.5m1m8m StandardIEEE 1394USB Implementers Forum PCI-SIGSATA-IOINCITS TC T10

Typical x86 PC I/O System

VGA Controller