Cyclic Combinational Circuits and Other Novel Constructs Marrella splendensCyclic circuit (500 million year old Trilobite)(novel construct)

inputsoutputs The current outputs depend only on the current inputs. Combinational Circuits combinational logic

NAND OR AND NOR Acyclic (i.e., feed-forward) circuits are always combinational. Combinational Circuits

Synthesis General methodology: optimize by introducing feedback in the substitution/minimization phase. Developed a tool called CYCLIFY within Berkeley SIS Environment. Optimizations are significant and applicable to a wide range of circuits. Design a circuit to meet a specification.

Example: 7 Segment Display Inputs a b c d e f g Output xxxx

Example: 7 Segment Display a b c d e f g Output

Substitution Basic minimization/restructuring operation: express a function in terms of other functions. Substitute b into a: (cost 9) a  ))(( xxxxxxxxx  (cost 8) Substitute c into a: (cost 5) Substitute c, d into a: (cost 4) a  )( bxxxxxbx  a  cxxcx 321  a  dccx  1

Substitution/Minimization Berkeley SIS Tool a  ))(( xxxxxxxxx  },,,{fdcb target function substitutional set a  dccx  1 low-cost expression   

Acyclic Substitution g f e b a c d Select an acyclic topological ordering: g f e d c b a       

g f d c b a       edcaxx  21 dccx  1 xxxxxxxxx  ))((dxxxxxx  )(cdxx  10 )( Select an acyclic topological ordering: Area (literal count): 37 Acyclic Substitution e   3 cxb d ba  f

Select an acyclic topological ordering: Nodes at the top benefit little from substitution. g f d c b a       edcaxx  21 dccx  1 xxxxxxxxx  ))((dxxxxxx  )(cdxx  10 )( e   3 cxb d ba  f

Cyclic Substitution How can we find a cyclic solution that is combinational? g f d c b a       e  ?

Target Candidates Simpler Example: Cyclic Substitution

Target Candidates Simpler Example: Cyclic Substitution

Target Candidates Simpler Example: Cyclic Substitution

“Break-Down” approach Search performed outside space of combinational solutions. Terminates on optimal solution * cost 12 cost 13 cost 12 cost 13 combinational cost 14 Branch and Bound

“Build-Up” approach cost 17 cost 16 cost 15 not combinational cost 14 Branch ( without Bounding ) cost 13 best solution Search performed inside space of combinational solutions

g f e d c b a        Area (literal count): 34 Combinational solution: xe 0 bxa 3  gxxxax 1023 )(  axxex 321 )(  exxxxxx )(  cxxcx 301  xxxfx 1023 )(  f Example: 7 Segment Display

Limit the density of edges a priori Limit breadth Tunnel depth-wise (with backtracking) Branch and Bound Heuristics: for target functions, configurations n Large search space: (See “The Synthesis of Cyclic Circuits,” DAC, ’03)

Optimization for Area Number of NAND2/NOR2 gates for Berkeley SIS vs. CYCLIFYsolutions BenchmarkBerkeley SISCYCLIFYImprovement 5xp % ex % planet % s % bw % cse % pma % s % duke % styr % s % Based on “script.rugged” sequence and technology mapping.

Optimization for Area and Delay Berkeley SISCYCLIFY benchmarkAreaDelayAreaImprovementDelayImprovement p % % t % % in % % in % % 5xp %224.35% bw % % s % % s % % duke % % s % % s % % Number of NAND2/NOR2 gates and the Delay of Berkeley SIS vs. CYCLIFY solutions Based on “script.delay” sequence and technology mapping.

Practice Improvements in area (and consequently power) and delay are significant. Similar improvements were obtained for larger scale circuits: e.g., the ALU of an 8051 microprocessor. E.D.A. companies (Altera and Synopsys) have expressed strong interest.

Synthesis General methodology: optimize by introducing feedback in the substitution/minimization phase. Optimizations are significant and applicable to a wide range of circuits. Design a circuit to meet a specification.

Example: 7 Segment Display Inputs a b c d e f g Output xxxx

Example: 7 Segment Display a b c d e f g Output

Substitution/Minimization Basic minimization/restructuring operation: express a function in terms of other functions. Substitute b into a: (cost 9) a  ))(( xxxxxxxxx  (cost 8) Substitute c into a: (cost 5) Substitute c, d into a: (cost 4) a  )( bxxxxxbx  a  cxxcx 321  a  dccx  1

Substitution/Minimization Berkeley SIS Tool a  ))(( xxxxxxxxx  },,,{fdcb target function substitutional set a  dccx  1 low-cost expression   

Acyclic Substitution g f e b a c d Select an acyclic topological ordering: g f e d c b a       

g f d c b a       edcaxx  21 dccx  1 xxxxxxxxx  ))((dxxxxxx  )(cdxx  10 )( Select an acyclic topological ordering: Cost (literal count): 37 Acyclic Substitution e   3 cxb d ba  f

Select an acyclic topological ordering: Nodes at the top benefit little from substitution. g f d c b a       edcaxx  21 dccx  1 xxxxxxxxx  ))((dxxxxxx  )(cdxx  10 )( e   3 cxb d ba  f

Cyclic Substitution Try substituting every other function into each function: Not combinational! Cost (literal count): 30  0 1 ex dccx fba geex bcdx gxaxex egxxax      f g f d c b a       e 

Cost 30 Lower bound Cost 37 Upper bound Acyclic substitution Unordered substitution Cyclic solution? Cost 34

Cyclic Substitution g f e d c b a        Cost (literal count): 34 Combinational solution: xe 0 bxa 3  gxxxax 1023 )(  axxex 321 )(  exxxxxx )(  cxxcx 301  xxxfx 1023 )(  f

Cyclic Substitution Cost (literal count): 34 Combinational solution: topological cycles g f e d c b a        xe 0 bxa 3  gxxxax 1023 )(  axxex 321 )(  exxxxxx )(  cxxcx 301  xxxfx 1023 )(  f

Inputs x 3, x 2, x 1, x 0 Cost (literal count): 34 ba ga e e e c        1 no electrical cycles Cyclic Substitution g f e d c b a        xe 0 bxa 3  gxxxax 1023 )(  axxex 321 )(  exxxxxx )(  cxxcx 301  xxxfx 1023 )(  f = [0,0,1,0]:

g f e d c b a        Cost (literal count): 34 ba ga e e e c        1        Cyclic Substitution no electrical cycles xe 0 bxa 3  gxxxax 1023 )(  axxex 321 )(  exxxxxx )(  cxxcx 301  xxxfx 1023 )(  f Inputs x 3, x 2, x 1, x 0 = [0,0,1,0]:

g f e d c b a        Cost (literal count): 34 ba ga e e e c        1        a b c d e f g Cyclic Substitution xe 0 bxa 3  gxxxax 1023 )(  axxex 321 )(  exxxxxx )(  cxxcx 301  xxxfx 1023 )(  f Inputs x 3, x 2, x 1, x 0 = [0,0,1,0]:

g f e d c b a        Cost (literal count): 34 ba ga e e e c        1        a b c d e f g Cyclic Substitution xe 0 bxa 3  gxxxax 1023 )(  axxex 321 )(  exxxxxx )(  cxxcx 301  xxxfx 1023 )(  f Inputs x 3, x 2, x 1, x 0 = [0,0,1,0]:

g f e d c b a        Cost (literal count): 34 ba ga e e e c        1        a b c d e f g Cyclic Substitution xe 0 bxa 3  gxxxax 1023 )(  axxex 321 )(  exxxxxx )(  cxxcx 301  xxxfx 1023 )(  f Inputs x 3, x 2, x 1, x 0 = [0,0,1,0]:

g f e d c b a        Cost (literal count): 34 Cyclic Substitution xe 0 bxa 3  gxxxax 1023 )(  axxex 321 )(  exxxxxx )(  cxxcx 301  xxxfx 1023 )(  f Inputs x 3, x 2, x 1, x 0 = [0,1,0,1]:

g f e d c b a        Cost (literal count): 34 Cyclic Substitution ba a a 1 0 c        f xe 0 bxa 3  gxxxax 1023 )(  axxex 321 )(  exxxxxx )(  cxxcx 301  xxxfx 1023 )(  f Inputs x 3, x 2, x 1, x 0 = [0,1,0,1]: no electrical cycles

g f e d c b a        Cost (literal count): 34        Cyclic Substitution ba a a 1 0 c        f xe 0 bxa 3  gxxxax 1023 )(  axxex 321 )(  exxxxxx )(  cxxcx 301  xxxfx 1023 )(  f no electrical cycles Inputs x 3, x 2, x 1, x 0 = [0,1,0,1]:

g f e d c b a        Cost (literal count): 34 a b c d e f g Cyclic Substitution        ba a a 1 0 c        f xe 0 bxa 3  gxxxax 1023 )(  axxex 321 )(  exxxxxx )(  cxxcx 301  xxxfx 1023 )(  f Inputs x 3, x 2, x 1, x 0 = [0,1,0,1]:

g f e d c b a        Cost (literal count): 34 Cyclic Substitution        ba a a 1 0 c        f a b d e f g xe 0 bxa 3  gxxxax 1023 )(  axxex 321 )(  exxxxxx )(  cxxcx 301  xxxfx 1023 )(  f Inputs x 3, x 2, x 1, x 0 = [0,1,0,1]: c

Synthesis Strategy: Allow cycles in the substitution phase of logic synthesis. Find lowest-cost combinational solution )( )( )( xxxxxc xxxxxxb xxxxxxa       Collapsed: Cost: xxaxc cxxxxb xxbxa       Solution: Cost: 13

“Break-Down” approach Exclude edges Search performed outside space of combinational solutions cost 12 cost 13 cost 12 cost 13 combinational cost 14 Branch and Bound

“Build-Up” approach Include edges Search performed inside space of combinational solutions cost 17 cost 16 cost 15 not combinational cost 14 Branch and Bound cost 13 best solution

Implementation: CYCLIFY Program Incorporated synthesis methodology in a general logic synthesis environment (Berkeley SIS package). Trials on wide range of circuits –randomly generated –benchmarks –industrial designs. Consistently successful at finding superior cyclic solutions.

Benchmark Circuits Cost (literals in factored form) of Berkeley SIS Simplify vs. Cyclify Circuit# Inputs# OutputsBerkeleySimplifyCaltechCyclifyImprovement dc % ex % p % t % bbsse % sse % 5xp % s % dk % apla % tms % cse % clip % m % s % t % ex % exp %

Benchmarks Example: EXP circuit Cyclic Solution (Caltech CYCLIFY ): cost 262 Acyclic Solution (Berkeley SIS ): cost 320 cost measured by the literal count in the substitute/minimize phase

Discussion A new definition for the term “combinational circuit”: a directed, possibly cyclic, collection of logic gates. Most circuits can be optimized with feedback. Optimizations are significant. Paradigm shift: