M. A. Clarke-GaytherRAL/ASTeC/HIPPI SPG development Beam Chopper R & D for Next Generation High Power Proton Drivers Michael A. Clarke-Gayther RAL / ASTeC / HIPPI

M. A. Clarke-GaytherRAL/ASTeC/HIPPI ‘Fast-Slow’ Chopping at RAL Project planning / Overview:

M. A. Clarke-GaytherRAL/ASTeC/HIPPI ‘Fast-Slow’ Chopping at RAL Project planning / Detail:

M. A. Clarke-GaytherRAL/ASTeC/HIPPI ‘Fast-Slow’ Chopping at RAL HIPPI WP4: The RAL† Fast Beam Chopper Development Programme Progress Report for the period: January 2004 – June 2005 M. A. Clarke-Gayther † † CCLRC Rutherford Appleton Laboratory, Didcot, Oxfordshire, UK EU contract number RII3-CT CARE/HIPPI Document

M. A. Clarke-GaytherRAL/ASTeC/HIPPI ‘Fast-Slow’ Chopping at RAL  ‘Fast – Slow’ chopping  RAL Front-End Test Stand (FETS) chopping schemes  High voltage pulse generator development Fast Pulse Generator (FPG) Slow Pulse Generator (SPG)  Slow – wave structure development Helical structure B Helical structure C Outline See: Giulia Bellodi’s talk later in this session

M. A. Clarke-GaytherRAL/ASTeC/HIPPI ‘Fast-Slow’ Chopping at RAL ‘Fast – Slow’ chopping

M. A. Clarke-GaytherRAL/ASTeC/HIPPI ‘Fast-Slow’ Chopping at RAL

M. A. Clarke-GaytherRAL/ASTeC/HIPPI ‘Fast-Slow’ Chopping at RAL Chopper 1 (fast transition) Chopper 2 / Beam dump (slower transition) BEAM Fast and slow chopper modules

M. A. Clarke-GaytherRAL/ASTeC/HIPPI ‘Fast-Slow’ Chopping at RAL RAL FETS chopping schemes

M. A. Clarke-GaytherRAL/ASTeC/HIPPI RAL FETS chopping schemes

M. A. Clarke-GaytherRAL/ASTeC/HIPPI RAL FETS chopping schemes KEY PARAMETERSSCHEME A (FETS)SCHEME B (FETS)SCHEME C (ESS) ION SPECIESH- ENERGY (MeV) RF FREQUENCY (MHz) BEAM CURRENT (mA)57 NORMALISED RMS INPUT EMITTANCE IN X / Y / Z PLANES ( π.mm.mr & π.deg.MeV) 0.25 / 0.25 / / 0.2 / 0.13 RMS EMITTANCE GROWTH IN X / Y / Z PLANES (%)12 / 16 / 427 / 27 / / 12 / - 5 CHOPPING FACTOR (%) CHOPPING EFFICIENCY (%) FAST CHOPPER PULSE: TRANSITION TIME / DURATION / PRF/ BURST DURATION / BRF 2 ns / 9 ns / 2.6 MHz / 0.3 μs / 50 Hz 2 ns / 12 ns / 2.4 MHz / 1 ms / 50 Hz FAST CHOPPER ELECTRODE EFFECTIVE LENGTH / GAPS (mm)500 / 20 (340 x 0.73 = 248) / 14 FAST CHOPPER POTENTIAL (V)± 2000± 1500± 2200 SLOW CHOPPER PULSE: TRANSITION TIME / DURATION / PRF/ BURST DURATION / BRF 9 ns / 0.1 μs / 1.3 MHz / 0.3 μs / 50 Hz 12 ns / 240 ns – 0.1 ms / 1.2 MHz / 1 ms / 50 Hz SLOW CHOPPER EFFECTIVE LENGTH / GAPS (mm)500 / 20 (360 x 0.8 = 288) / 11 SLOW CHOPPER POTENTIAL (V)± 2000± 3000± 6000 POWER ON FAST / SLOW BEAM DUMPS (W)150 / x 4 OPTICAL DESIGN CODESIMPACT / PATH PARMILA / TRACE & GPT

M. A. Clarke-GaytherRAL/ASTeC/HIPPI ‘Fast-Slow’ Chopping at RAL Fast Pulse Generator (FPG) Development

M. A. Clarke-GaytherRAL/ASTeC/HIPPI FPG development M. A. Clarke-GaytherRAL/ASTeC/HIPPI 13 Phase 1 FPG system Single 1.4 kV max. 9 x Pulse generator cards High peak power load Control and interface Combiner 9 x Pulse generator cards Power supply

M. A. Clarke-GaytherRAL/ASTeC/HIPPI FPG development M. A. Clarke-GaytherRAL/ASTeC/HIPPI 14 Phase 2 FPG system Dual 1.4 kV max. 9 x Pulse generator cards High peak power loads Control and interface Combiner 9 x Pulse generator cards Power supply 9 x Pulse generator cards

M. A. Clarke-GaytherRAL/ASTeC/HIPPI FPG development

M. A. Clarke-GaytherRAL/ASTeC/HIPPI FPG development FPG Waveforms at ± 1.4 kV peak & 0. 2 ms / div. FPG Waveforms at ± 1.4 kV peak & 2 μ s / div.FPG Waveforms at ± 1.4 kV peak & 5 ns / div. FPG Waveforms at ± 1.4 kV peak & 100 ns / div. Phase 2 FPG waveform measurement

M. A. Clarke-GaytherRAL/ASTeC/HIPPI FPG development FPG timing jitter at 10 ps / div. Phase 2 FPG waveform measurement

M. A. Clarke-GaytherRAL/ASTeC/HIPPI FPG development Pulse ParameterESS Requirement MeasuredCompliancyComment Amplitude (kV into 50 Ohms)± 2.2± 1.5NoScalable Transition time (ns)≤ 2.0T rise = 1.8, T fall = 1.2Yes10 – 90 % Duration (ns) YesFWHM Droop (%)2.0 in 10 ns1.9 in 10 nsYesF 3dB ~ 300 kHz Repetition frequency (MHz)2.4 Yes Burst duration (ms)1.5 Yes Burst repetition frequency (Hz)50 YesDuty cycle ~ 0.27 % Post pulse aberration (%)± 2± 5NoReducible Timing stability (ps over 1 hour)± 100± 50YesPeak to Peak Burst amplitude stability (%)+ 10, , - 3Yes Measured performance parameters for the Phase 2 FPG system

M. A. Clarke-GaytherRAL/ASTeC/HIPPI FPG development Time & amplitude dependent FPG waveform analysis / 324 MHz FETS scheme

M. A. Clarke-GaytherRAL/ASTeC/HIPPI FPG development † Assumes 4 kV SPG with ~ 9 ns transition time (10 – 90 %) ††Assumes 8 kV SPG with ~ 12 ns transition time (10 – 90%) FPG duty cycle and LF droop for the ESS and FETS schemes

M. A. Clarke-GaytherRAL/ASTeC/HIPPI FPG development FPG duty cycle droop compensation

M. A. Clarke-GaytherRAL/ASTeC/HIPPI FPG development FPG duty cycle droop compensation I.S. RAMPING (100 % CHOPPING)30 % CHOPPINGOFF

M. A. Clarke-GaytherRAL/ASTeC/HIPPI FPG development FPG duty cycle droop compensation I.S. RAMPING (100 % CHOPPING)30 % CHOPPINGOFF

M. A. Clarke-GaytherRAL/ASTeC/HIPPI FPG development FPG duty cycle droop compensation I.S. RAMPING (100 % CHOPPING)30 % CHOPPINGOFF

M. A. Clarke-GaytherRAL/ASTeC/HIPPI FPG development FPG duty cycle droop compensation CHBEAMI.S. RAMPINGCHBEAMCHBEAMCHBEAMCH 805 ns

M. A. Clarke-GaytherRAL/ASTeC/HIPPI FPG development FPG duty cycle droop compensation CHBEAMI.S. RAMPINGCHBEAMCHBEAMCHBEAMCH 805 ns

M. A. Clarke-GaytherRAL/ASTeC/HIPPI ‘Fast-Slow’ Chopping at RAL Slow Pulse Generator (SPG) Development

M. A. Clarke-GaytherRAL/ASTeC/HIPPI SPG development 16 close coupled ‘slow’ pulse generator modules Slow chopper electrodes Beam SPG beam line layout and load analysis

M. A. Clarke-GaytherRAL/ASTeC/HIPPI SPG development SPG prototype system / Electronic implementation

M. A. Clarke-GaytherRAL/ASTeC/HIPPI SPG development 0.8 m 0.28 m SPG Module SPG prototype system / Modular construction

M. A. Clarke-GaytherRAL/ASTeC/HIPPI SPG development Prototype SPG module / Side view Non-inductive damping resistors 8 kV push-pull MOSFET switch module High voltage feed-through (output port) Axial cooling fansAir duct 0.26 m

M. A. Clarke-GaytherRAL/ASTeC/HIPPI SPG development Two turn load inductance ~ 50 nH Load capacitance ~ 30 pf 6 kV, 400 MHz ÷ 1000 probe - 8 kV ~ 5 μF LF cap. bank + 8 kV ~ 5 μF LF cap. bank - 8 kV ~ 3 nF HF cap. bank + 8 kV ~ 3 nF HF cap. bank HV dampin g resistor 8 kV push-pull MOSFET switch Trigger input Auxiliary power supplies Cooling fan SPG pre-prototype ‘Breadboard’ system

M. A. Clarke-GaytherRAL/ASTeC/HIPPI SPG development SPG waveforms at ± 6 kV peak & 50 ns / div. SPG waveforms at ± 6 kV peak & 0.5 μs / div. SPG waveforms at ± 6 kV peak & 0.2 ms / div. SPG timing jitter at 100ps / div. ‘Breadboard’ SPG waveform measurement

M. A. Clarke-GaytherRAL/ASTeC/HIPPI SPG development Pulse ParameterESS Requirement MeasuredCompliancyComment Amplitude (kV into 50 Ohms)± 6.0 Yes± 8 kV rated Transition time (ns)~ 12.0T rise ~ 13, T fall ~ 12Yes10 – 90 % Duration (μs)0.2 – 100 YesFWHM Droop (%)00YesDC coupled Repetition frequency (MHz) (≤ 6 μs burst)LimitedBurst limitation Burst 1.2 MHz1.5 ms≤ 6 μsNoBurst limitation Burst 0.1 MHz PRF-≤ 10 ms-PRF limitation Burst repetition frequency (Hz)50 YesDuty cycle ~ 0.27 % Post pulse aberration (%)± 2≤ ± 2Yes Timing stability (ns over 1 hour)± 0.5± 0.4YesPeak to Peak Burst amplitude stability (%)+ 10, - 5< + 10, 0.1 MHz PRF Measured performance parameters for the ‘Breadboard’ SPG system

M. A. Clarke-GaytherRAL/ASTeC/HIPPI ‘Fast-Slow’ Chopping at RAL Slow – Wave structure Development

M. A. Clarke-GaytherRAL/ASTeC/HIPPI Slow-wave structure development Helical structure B with L - C trimmers and adjustable delay Adjustable L-C trimmer Adjust cable lengths to change delay

M. A. Clarke-GaytherRAL/ASTeC/HIPPI Slow-wave structure development Helical structure C with L - C trimmers Quadrupole bore diameter

M. A. Clarke-GaytherRAL/ASTeC/HIPPI ‘Fast-Slow’ Chopping at RAL Summary  Three candidate chopping schemes for RAL FETS Schemes A & B ready for first engineering analysis  FPG can meet ESS and RAL FETS requirements Duty cycle droop compensation scheme to be tested  SPG prototype system designed and part constructed Pre - prototype measurements show PRF limitation  Slow – wave structure engineering concepts refined L – C impedance trimming and adjustable delay

M. A. Clarke-GaytherRAL/ASTeC/HIPPI Bibliography ‘ ‘Fast-Slow’ Beam Chopping for next generation high power proton drivers’, M.A. Clarke-Gayther, Proc. of PAC 2005, Knoxville, Tennessee, USA, May, 2005, at press. CARE-Conf HIPPI ‘Re-design of the RAL chopper line’ F Gerigk, G Bellodi CCLRC, ASTeC, Intense Beams Group HIPPI-WP5 meeting, Coseners House, Abingdon, UK 13th April ‘A fast beam chopper for next generation high power proton drivers’, M. A. Clarke-Gayther, Proc. of the Ninth EPAC, Lucerne, Switzerland, 5-9 July, 2004, p CARE-Conf HIPPI ‘A new 180 MeV H- Linac for Upgrades of ISIS’, F. Gerigk Proc. of the ninth EPAC, Lucerne, Switzerland, 5-9 July, 2004, p

M. A. Clarke-GaytherRAL/ASTeC/HIPPI Bibliography ‘A review of fast beam chopping’, F. Caspers, Proc. of Linac 04, Lubeck, Germany, August, 2004, p CARE-Conf-04-???-HIPPI ‘Slow-wave electrode structures for the ESS 2.5 MeV fast chopper’, M.A. Clarke-Gayther, Proc. of PAC 2003, Portland, Oregon, USA, May, 2003, p ‘A Fast Chopper for the ESS 2.5 MeV Beam Transport Line’, M. A. Clarke-Gayther Proc. of the eighth EPAC, Paris, France, 3-7 June, 2002, p ‘Slow-wave electrode structures for the ESS 2.5 MeV fast chopper’, M.A Clarke-Gayther, Proc. of the Eighth EPAC, Paris, France, 3-7 June, 2002, p ‘Modulator systems for the ESS 2.5 MeV Fast Chopper’, M.A Clarke-Gayther, Proc. of PAC 2001, Chicago, June 2001, p

M. A. Clarke-GaytherRAL/ASTeC/HIPPI Unipolar AC coupled FPG baseline ‘droop’