1 EENG 2710 Chapter 2 Algebraic Methods For The Analysis and Synthesis of Logic circuits.

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Presentation transcript:

1 EENG 2710 Chapter 2 Algebraic Methods For The Analysis and Synthesis of Logic circuits

2 Chapter 2 Homework 2.1c, 2.2c, 2.3, 2.4, 2.5, 2.6b, 2.7a, 2.10b, 2.16b, 2.18b, 2.25, 2.29a

3 Logic Function or Gate Representation Logic functions or gates can be represented: –algebraically –using truth tables –using electronic circuits.

4 Basic Logic Functions The three basic logic functions are: –AND Gate –OR Gate –NOT Gate Y = AB

5 Algebraic Representation Uses Boolean algebra. Boolean variables have two states (binary). Boolean operators include AND, OR, and NOT gates.

6 Truth Table Representation Defines the output of a function for every possible combination of inputs. A system with n inputs has 2 n possible combinations.

7 Electronic Circuit Representation Uses logic gates to perform Boolean algebraic functions. Gates can be represented by schematic symbols. Symbols can be either distinctive-shape or rectangular-outline.

8 Distinctive Shape Schematic Symbols Uses different graphic representations for different logic functions. Uses a bubble (a small circle) to indicate a logical inversion.

9 Rectangular-Outline Schematic Symbols All functions are shown in rectangular form with the logic function indicated by standard notation inside the rectangle. The notation specifying the logic function is called the qualifying symbol. Inversion is indicated by a 1/2 arrowhead.

10 NOT Function One input and one output. The output is the opposite logic level of the input. The output is the complement of the input.

11 NOT Function Boolean Representation Inversion is indicated by a bar over the signal to be inverted.

12 NOT Function Electronic Circuit Called a NOT gate or, more usually, an INVERTER. Distinctive-shape symbol is a triangle with inversion bubble. Rectangular-shape symbol uses “1” and the inversion 1/2 arrowhead.

13 NOT Function Electronic Circuit

14 AND Function Two or more inputs, one output. Output is HIGH only when all of the inputs are HIGH. Output is LOW whenever any input is LOW.

15 ABY AND Function

16 AND Boolean Representation AND symbol is “” or nothing at all.

17 AND Function Electronic Circuit Called an AND gate. Distinctive-shape symbol uses AND designation. Rectangular-shape symbol use “&” as designator.

18 AND Function Electronic Circuit

19 AND Function Electronic Circuit

20 ABCY AND Function Electronic Circuit

21 OR Function Two or more inputs, one output. Output is HIGH whenever one or more input is HIGH. Output is LOW only when all of the inputs are LOW.

22 OR Function ABY

23 OR Boolean Representation OR symbol is “+”. Y = A + B

24 OR Function Electronic Circuit Called an OR gate. Distinctive-shape symbol uses OR designation. Rectangular-shape symbol uses “  ” as designator.

25 OR Function Electronic Circuit

26 Active Level The logic level defined as “ON” for a circuit. When a logic HIGH is “ON”, the signal is active-HIGH. When a logic LOW is “ON”, the signal is active-LOW.

27 NAND Function Generated by inverting the output of the AND function. Output is HIGH whenever any input is LOW. Output is LOW only when all inputs are HIGH.

28 NAND Function ABY

29 NAND Boolean Representation Uses AND with an inversion overbar.

30 NAND Function Electronic Circuit Called a NAND gate. Uses the AND symbol with inversion on.

31 NAND Function Electronic Circuit

32 NOR Function Generated by inverting the output of the OR function. Output is HIGH only when all inputs are LOW. Outputs is LOW whenever any input is HIGH.

33 ABY NOR Function

34 NOR Boolean Representation Uses OR with an inversion overbar.

35 NOR Function Electronic Circuit Called a NOR gate. Uses OR symbol with inversion on the output.

36 NOR Function Electronic Circuit

37 3 Input NOR and NAND Function Truth Tables 3 Input NAND: 3 Input NOR:

38 ABC Input NOR and NAND Function Truth Tables

39 Exclusive OR Gate Two inputs, one output. Output is HIGH when one, and only one, input is HIGH. Output is LOW when both inputs are equal – both HIGH or both LOW.

40 Exclusive OR Gate

41 ABY Exclusive OR Gate

42 Exclusive NOR Gate Two inputs, one output. Output is HIGH when both inputs are equal – both HIGH or both LOW. Output is LOW when one, and only one, input is HIGH.

43 Exclusive NOR Gate

44 ABY Exclusive NOR Gate

45 Gate Equivalence – NAND A NAND gate can be represented by an AND gate with inverted output. A NAND gate can be represented by an OR gate with inverted inputs.

46 Gate Equivalence – NAND

47 Gate Equivalence – NOR A NOR gate can be represented by an OR gate with inverted output. A NOR gate can be represented by an AND gate with inverted inputs.

48 Gate Equivalence – DeMorgan Forms Change an AND function to an OR function and an OR function to an AND function. Invert the inputs. Invert the outputs.

49 DeMorgan’s Theorem Break the line and change the sign

50 DeMorgan’s Theorem The following are two common errors associated with DeMorgan’s Theorem:

51 Active Logic Levels Any INPUT or OUTPUT that has a BUBBLE is considered as active LOW. Any INPUT or OUTPUT that has no BUBBLE is considered as active HIGH.

52 Active Logic Levels - NOR At least one input HIGH makes the output LOW. All inputs LOW make the output HIGH.

53 Active Logic Levels - NOR

54 Postulates of Boolean Algebra P1: + = OR,. = AND P2(a): a + 0 = a

55 Postulates of Boolean Algebra P2(b): = a 1 = a

56 Postulates of Boolean Algebra P3(a): a + b = b + a P3(b): b + a = a + b P4(a): a + (b + c) = (a + b) + c P4(a): a(b c) = (a b)c

57 Postulates of Boolean Algebra P5(a): a + bc = (a + b)(a + c)

58 Postulates of Boolean Algebra P5(b): a (b + c) = ab + ac

59 P6(a): a + a’ = 1 where a’ = not a Postulates of Boolean Algebra

60 Postulates of Boolean Algebra P6(b): a a’ = 0

61 Postulates of Boolean Algebra Postulates not in your book: x  0 = x

62 Postulates of Boolean Algebra Postulates not in your book: x  1 = x’

63 Theorems of Boolean Algebra T1(a): a + a = a –Short Proof: If a = 1, = 1 or If a = 0, = 0 –Long proof: (shown in book)

64 Theorems of Boolean Algebra T1(b): a a = a –Short Proof: If a = 1, 1 x 1 = 1 or If a = 0, 0 x 0 = 0 T2(a): a + 1 = 1 –Short Proof: If a = 1, = 1 or If a = 0, = 1 T2(b): a 0 = 0 –Short Proof: If a = 1, 1 x 0 = 0 or If a = 0, 0 x 0 = 0

65 Theorems of Boolean Algebra T3(a): (a’)’ = a –Short Proof: If a = 1, then a’ =0, Thus (0)’ = 1 If a = 0, then a’ =1, Thus (1)’ = 0 T4(a): a + ab = a –Proof: a + ab = a(1 + b) = a(1) = a

66 Theorems of Boolean Algebra T4(b): a (a + b) = a –Proof: a (a + b) = aa + ab) = a + ab = a(1 + b) = a(1) = a T4(b): a (a + b) = a –Proof: a (a + b) = aa + ab) = a + ab = a(1 + b) = a(1) = a

67 Theorems of Boolean Algebra T5(a): a + a’b = a + b –Proof: a + a’b = (a + a’)( a + b) = 1(a + b) = a + b T5(b): a (a’+b) = ab

68 Theorems of Boolean Algebra T6(a): ab + ab’ = a –Proof: ab + ab’ = a(b + b’) = a(1) = a T6(b): (a + b)(a + b’) = a –Proof: (a + b)(a + b’) = aa + ab’ +ab’ +bb’ = a + ab’ = a(1 + b) = a(1) =a

69 Theorems of Boolean Algebra T7(a): ab + ab’c = ab + ac –Proof: ab + ab’c = a(b + b’c) = a (b + b’)( b + c) = a(1)(b + c) = ab + ac

70 Theorems of Boolean Algebra T7(b): (a + b)(a + ab’ + c) = (a + b) + (a + c) –Proof: a + ab’ + c a + b aa + aab’ + ac ab + abb’ + bc a + ab’ + ac + ab bc a(1 + b’) + ac + ab + bc a + ac + ab + bc a(1 + c) + ab + bc a + ab + bc a(1 +b) + bc a + bc = (a + b) + (a + c) Same as P5(a)

71 Theorems of Boolean Algebra (DeMorgan’s Theorem) T8(a): (a + b)’ = a’b’ T8(b): (ab)’ = a’ + b’

72 Theorems of Boolean Algebra T9(a): ab + a’c + bc = ab + a’c –Proof: ab + a’c + bc = ab +a’c + (1)(bc) = ab +a’c + (a + a’)(bc) = ab +a’c + (abc + a’bc) = (ab +abc) + (a’c + a’cb) = ab(1+c) + a’c(1 + b) = ab + a’c

73 Theorems of Boolean Algebra T9(b): (a + b)(a’ + c)(b + c) = (a + b)(a’ + c)

74 Operations with Logic 0 & 1

75 Operations with the Same Variable & Complement of a Variable

76 Simplifying an Expression

77 Simplifying an Expression

78 Problem 6a Simplify the following switching function:

79 Algebraic Forms of switching functions Product term: –Part of a Boolean expression where one or more true or complement variables are ANDed. Sum term: –Part of a Boolean expression where one or more true or complement variables are ORed.

80 Algebraic Forms of Switching Functions Sum-of-products (SOP): –A Boolean expression where several product terms are summed (ORed) together. Product-of-sum (POS): –A Boolean expression where several sum terms are multiplied (ANDed) together.

81 Algebraic Forms of Switching Functions (Examples of SOP and POS Expressions)

82 Algebraic Forms of Switching Functions SOP and POS Utility –SOP and POS formats are used to present a summary of a switching circuit operation.

83 Algebraic Forms of Switching Functions (Canonical SOP Minterms)

84 Algebraic Forms of Switching Functions (Canonical SOP Minterms)

85 Algebraic Forms of Switching Functions (Canonical SOP Minterms) Example

86 Algebraic Forms of Switching Functions (Canonical SOP Minterms)

87 Algebraic Forms of Switching Functions (Canonical POS Maxterms)

88 Algebraic Forms of Switching Functions Truth Table: POS = 0’s and SOP = 1’s  M(0,1, 4, 5) =  m(2, 3, 6, 7)

89 Problem 16a & 18a  M(1) =  m(0, 2,3)

90 Problem 18a (Using Boolean Algebra)

91 Universality of NAND/NOR Gates Any logic gate can be implemented using only NAND or only NOR gates.

92 NOT from NAND An inverter can be constructed from a single NAND gate by connecting both inputs together.

93 NOT from NAND

94 AND from NAND The AND gate is created by inverting the output of the NAND gate.

95 AND from NAND

96 OR and NOR from NAND

97 OR from NAND

98 NOR from NAND

99 NOT from NOR An inverter can be constructed from a single NOR gate by connecting both inputs together.

100 NOT from NOR

101 OR from NOR The OR gate is created by inverting the output of the NOR gate.

102 OR from NOR

103 AND and NAND from NOR

104 AND from NOR

105 NAND from NOR

106 Simplest Switching Expression From A Timing Diagram

107 Simplest Switching Expression From A Timing Diagram

108 Simplest Switching Expression From A Timing Diagram

109 Simplest Switching Expression From A Timing Diagram

110 Problem 29b

111 Venn Diagrams

112 Venn Diagrams