Chapter 2 Parts of a Computer System. 2.1 PC Hardware: Memory.

Slides:



Advertisements
Similar presentations
Registers of the 8086/ /2002 JNM.
Advertisements

Machine/Assembler Language Putting It All Together Noah Mendelsohn Tufts University Web:
Introduction to 8086 Microprocessor
CEN 226: Computer Organization & Assembly Language :CSC 225 (Lec#3) By Dr. Syed Noman.
1 Hardware and Software Architecture Chapter 2 n The Intel Processor Architecture n History of PC Memory Usage (Real Mode)
© 2006 Pearson Education, Upper Saddle River, NJ All Rights Reserved.Brey: The Intel Microprocessors, 7e Chapter 2 The Microprocessor and its Architecture.
1 ICS 51 Introductory Computer Organization Fall 2006 updated: Oct. 2, 2006.
Assembly Language Advantages 1. It reveals the secret of your computer’s hardware and software. 2. Speed. 3. Some special applications and occasions. Disadvantages.
Assembly Language for Intel-Based Computers Chapter 2: IA-32 Processor Architecture Kip Irvine.
ICS312 Set 3 Pentium Registers. Intel 8086 Family of Microprocessors All of the Intel chips from the 8086 to the latest pentium, have similar architectures.
© 2006 Pearson Education, Upper Saddle River, NJ All Rights Reserved.Brey: The Intel Microprocessors, 7e Chapter 2 The Microprocessor and its Architecture.
The 8086 Microprocessor The 8086, announced in 1978, was the first 16-bit microprocessor introduced by Intel Corporation 8086 is 16-bit MPU. Externally.
Monday, October 4 Assignment(s) due: Assignment #5: COMPLEMENT ARITHMETIC Assignment #6: DEBUG EXERCISES Quiz(zes) due:Quiz #5: Base Arithmetic Quiz #6.
CEG 320/520: Computer Organization and Assembly Language ProgrammingIntel Assembly 1 Intel IA-32 vs Motorola
An Introduction to 8086 Microprocessor.
CSNB374: Microprocessor Systems Chapter 2: Intel x86 Microprocessor Architecture.
Faculty of Engineering, Electrical Department,
1 Fundamental of Computer Suthida Chaichomchuen : SCC
Low Level Programming Lecturer: Duncan Smeed Overview of IA-32 Part 1.
Types of Registers (8086 Microprocessor Based)
Fall 2012 Chapter 2: x86 Processor Architecture. Irvine, Kip R. Assembly Language for x86 Processors 6/e, Chapter Overview General Concepts IA-32.
INSTRUCTION SET AND ASSEMBLY LANGUAGE PROGRAMMING
The x86 Architecture Lecture 15 Fri, Mar 4, 2005.
1 Introduction Chapter 1 CSI 2121 Lecture Notes Written by Mario Marchand
CET 3510 Microcomputer Systems Tech. Lecture 2 Professor: Dr. José M. Reyes Álamo.
1 ICS 51 Introductory Computer Organization Fall 2009.
UHD:CS2401: A. Berrached1 The Intel x86 Hardware Organization.
ECE291 Lecture 1 All about computers. ECE 291 Lecture 1Page 2 of 41 Lecture outline Top-down view of computers Processor architecture RegistersMemoryPeripherals.
(-133)*33+44* *33+44*14 Input device memory calculator Output device controller Control bus data bus memory.
Computers organization & Assembly Language Chapter 1 THE 80x86 MICROPROCESSOR.
X86 Assembly Language We will be using the nasm assembler (other assemblers: MASM, as, gas)
INTRODUCTION TO INTEL X-86 FAMILY
1 x86 Programming Model Microprocessor Computer Architectures Lab Components of any Computer System Control – logic that controls fetching/execution of.
Week 6 Dr. Muhammad Ayaz Intro. to Assembly Language.
Computer Organization & Assembly Language University of Sargodha, Lahore Campus Prepared by Ali Saeed.
BITS Pilani Pilani Campus Pawan Sharma Lecture / ES C263 INSTR/CS/EEE F241 Microprocessor Programming and Interfacing.
Microprocessors CSE- 341 Dr. Jia Uddin Assistant Professor, CSE, BRAC University Dr. Jia Uddin, CSE, BRAC University.
Intel MP Organization. Registers - storage locations found inside the processor for temporary storage of data 1- Data Registers (16-bit) AX, BX, CX, DX.
Microprocessors CSE- 341 Dr. Jia Uddin Assistant Professor, CSE, BRAC University Dr. Jia Uddin, CSE, BRAC University.
ΜComputer Structure μProcessor Memory Bus System I/O Ports.
Chapter 12 Processor Structure and Function. Central Processing Unit CPU architecture, Register organization, Instruction formats and addressing modes(Intel.
Chapter Overview General Concepts IA-32 Processor Architecture
Instruction Set Architecture
Homework Reading Lab with your assigned section starts next week
Assembly language.
Credits and Disclaimers
x86 Processor Architecture
Difference between Microprocessor and Microcontroller
Introduction to 8086 Microprocessor
8086 Microprocessor.
Computer Organization & Assembly Language Chapter 3
Chapter 2 The Microprocessor and its Architecture
Basic Microprocessor Architecture
Assembly IA-32.
Intel 8088 (8086) Microprocessor Structure
Homework Reading Continue work on mp1
Basic of Computer Organization
Chapter 2: The Microprocessor and its Architecture
Introduction to Assembly Language
Intel 8088 (8086) Microprocessor Structure
8086 Registers Module M14.2 Sections 9.2, 10.1.
CS-401 Computer Architecture & Assembly Language Programming
CS 301 Fall 2002 Computer Organization
The Microprocessor & Its Architecture
Assembly Language (CSW 353)
Computer Architecture CST 250
Chapter 2: The Microprocessor and its Architecture
Unit-I 80386DX Architecture
Machine-Level Programming II: Basics Comp 21000: Introduction to Computer Organization & Systems Instructor: John Barr * Modified slides from the book.
Credits and Disclaimers
Presentation transcript:

Chapter 2 Parts of a Computer System

2.1 PC Hardware: Memory

80x86 Memory Collection of “slots” each of which holds one byte (8 bits) Each slot identified by an address –32-bit systems use 32-bit addresses –64-bit systems use 64-bit addresses

Memory Units 1Kb = 2 10 = 1,024 (about a thousand), 1Mb = 2 20 = 1,048,576 (about a million) 1Gb = 2 30 = 1,073,741,824 (about a billion)

2.1 PC Hardware: The CPU

CPU’s Function Fetch instruction from memory Decode instruction Execute instruction Store results

80x86 Registers Internal to CPU – rapidly accessed Used in arithmetic and other operations 64-bit CPUs have larger and more registers

General Registers, 32-bit CPUs EAX, EBX, ECX, EDX, each 32 bits long The low-order 16 bits can be referenced by AX, BX, CX and DX, respectively The low-order 8 bits can be referenced by AL, BL, CL and DL, respectively Bits 8-15 can be referenced by AH, BH, CH and CH, respectively EAX is called the accumulator and sometimes has special instruction formats associated with it

Index Registers ESI, 32-bit source index used for –Source address in string moves –Array index –General purposes EDI, 32-bit destination index used for –Address of destination in string moves –Array index –General purposes

Stack Pointer, Base Pointer and Segment Registers ESP, 32-bit stack pointer –Holds address of top of stack EBP, 32-bit base pointer –Used in procedure calls to hold address of reference point in the stack Segment Registers used in segmented memory model –CS, DS, ES, FS, SS, GS –Each 16 bits long holding a segment selector –Managed by the operating system with flat memory model programming

Other Registers EIP, 32-bit instruction pointer –Holds address of next instruction to be fetched for execution EFLAGS, 32-bit –Collection of flags, or status bits –Records information about many operations Carry Flag (CF) is bit 0 Zero Flag (ZF) is bit 6 Sign Flag (SF) is bit 7 Overflow Flag (OF) is bit 11

Registers in 64-bit CPUs RAX, RBX, RCX, RDX, RSI, RDI, RSP, RBP, RIP, RFLAGS extend the 32-bit registers –Low-order 32 bits of RAX can be referenced by EAX; similarly for other registers R8 – R15 are new 64-bit general-use registers –Low-order 32-bits of R8 can be referenced by R8D –Low-order 16 bits by R8W; 8 bits by R8B

2.3 PC Hardware: I/O Devices

Input/Output At the hardware level, I/O ports are used –64K port addresses Since the instructions that access ports are unavailable in ordinary application programming, I/O is typically done by calls to operating system routines

2.4 PC Software

Operating System Manages program execution Provides access to I/O devices Provide user interface –Command line interface (e.g., DOS) –Graphical user interface (e.g., Windows)

Text Editors Used to create source programs or data files Notepad comes with Windows Word processors add extra formatting information –not normally used for creating assembly language source files

Language Translators Interpreters translate each high-level language source code line every time it is needed for execution Compilers translate HLL source code to object code that is almost ready for the CPU to execute Assemblers translate assembly language – a low level language – to object code

Linker Object code files produced by a compiler or assembler are not quite ready for execution A linker combines object code files and prepares them to be loaded into memory for execution

Debugger Allows the programmer to control execution of a program –Step through instructions one at a time –Stop at a preset breakpoint Lets you look at memory or register contents –Helps find programming errors –Helps understand how the computer works

Integrated Development Environment Single interface provides access to text editor, compiler or assembler, linker and debugger Microsoft Visual Studio is an IDE