Max Registers, Counters, and Monotone Circuits Keren Censor, Technion Joint work with: James Aspnes, Yale University Hagit Attiya, Technion (Slides were added to Keren’s original presentation. DH.) January 2010

Counting  Counter: reading and incrementing operations  In sequential algorithms – one variable  Counting is critical for some programs in multiprocessing systems  Example: Algorithms for randomized consensus 2 012

A single register  Does not work even for 2 processes and 2 increments  An increment is not an atomic operation s1s1 s1s1 s2s2 s2s2 Register 3 read write( 100 ) read write( 1 )... 

Model of Shared Memory  System of n processes  Communicating through Read/Write registers 4 s1s1 s1s1 s2s2 s2s2 R1R1 R1R1 snsn snsn R2R2 R2R2 RmRm RmRm … … read v write( v ) ok

Model of Distributed Computation  Crash failures: a failed process stops taking steps  Wait-free computation: an operation of a process must work even if all other processes fail  Asynchronous system: no timing assumptions  No clocks, no bound on the time between steps  Schedule (and failures) controlled by an adversary  Cannot tell whether a process is slow or failed 5

Model of Distributed Computation  Complexity measures:  Number of steps per operation  Amount of space  Local computation has no cost 6

Counter  Can be implemented using snapshots in linear time (in n) 7 Counter increment ok readCounter v +1

Snapshot-based counter  One single-writer register for each process  Increment by updating your register  Read by reading all the registers  Non trivial since we require linearizability 8 R1R1 R1R1 R2R2 R2R2 RnRn RnRn …

Goal and related work  Required: Counters with sub-linear (in the number of processes n) step complexity per operation  Lower bound of Ω (n) for time complexity by Jayanti, Tan, and Toueg [PODC 1996] and similar lower bounds by Ellen, Hendler, and Shavit [FOCS 2005]  Motivated work on approximate counting [Aspnes and C, SODA 2009] 9

Exact counting  Give up on sub-linear exact counting?  Or inspect lower bound more carefully:  Based on executions with many increments  But some applications use a small number of increments We show an implementation of a bounded counter where each operation takes sub-linear time 10 long operation

A tree-based counter s1s1 s1s1 s2s2 s2s2 s3s3 s3s3 snsn snsn s4s4 s4s4 … s 1 +s 2 s 3 +s 4 s s 4 ∑s i … … s n-1 +s n ReadCounter : return value at root Increment : recursively increment from leaf to root +1 p 1 increments update p k reads 11 O(log n) steps to increment O(1) steps to read counter

Seems nice, but…  If each node is a multi-writer register, then even for 2 processes and 2 increments this does not work s1s1 s1s1 s2s2 s2s2 s 1 +s 2 +1 p 1 increments p 2 increments +1 update 1 update 2 Counter is incorrect 12

Max register  Replace multi-writer registers with Max Registers  In this case the tree-based counter works  If max registers are linearizable then so is counter 13 Max Register WriteMax( v ) ok ReadMax v Maximal value previously written

A tree-based counter s1s1 s1s1 s2s2 s2s2 s3s3 s3s3 snsn snsn s4s4 s4s4 … s 1 +s 2 s 3 +s 4 s s 4 ∑s i … … s n-1 +s n ReadCounter : return value at root Increment : recursively increment from leaf to root 14

Max register – recursive construction  MaxReg 0 : Max register that supports only the value 0  WriteMax is a no-op, and ReadMax returns 0  MaxReg 1 supports values in {0,1}  Built from two MaxReg 0 objects  and one additional multi-writer register “switch” MaxReg 0 15 MaxReg 0 switch WriteMax =1 ReadMax switch=0 : return 0 switch=1 : return 1

Max register – recursive construction  MaxReg k supports values in {0,…,2 k -1}  Built from two MaxReg k-1 objects with values in {0,…,2 k-1 -1}  and one additional multi-writer register “switch” MaxReg k-1 MaxReg k switch WriteMax t t t t < 2 k-1 ? t t t -2 k-1 ReadMax =1 = ? t t t t switch=0 : return t switch=1 : return t +2 k-1 16

MaxReg k unfolded switch MaxReg 0 … switch MaxReg 0 … … Complexity does not depend on n: WriteMax and ReadMax in O(k) steps MaxReg k 17

Pseudocode: WriteMax(r,t) 18

Pseudocode: ReadMax(r) 19

Why is this algorithm linearizable? 20 Three operation types:  Operations on left branch: ReadMax(r) ops that read 0 from r.switch and WriteMax(r,t) with t<m that read 0 from r.switch  Operations on right branch: ReadMax(r) ops that read 1 from r.switch and WriteMax(r,t) with t  m  Writes with no effect: WriteMax(r,t) ops with t<m that read 1 from r.switch

21 Ordering operations:  Operations on left branch ordered before those on right branch  A Write with no effect linearized at latest possible time within its execution interval  Operations on left and right branch retain their linearization points (and are legal by induction hypothesis). Why is this algorithm linearizable? (cont'd)

A tree-based counter s1s1 s1s1 s2s2 s2s2 s3s3 s3s3 snsn snsn s4s4 s4s4 … s 1 +s 2 s 3 +s 4 s s 4 ∑s i … … s n-1 +s n ReadCounter : return value at root Increment : recursively increment from leaf to root 22 m-valued counter: ReadCounter : O(log m) steps Increment : O(log n log m) steps

Analysis  Inductive linearizability proof No contradiction with lower bound of JTT because of bounded size of max register and counter  Extension to unbounded max registers (and counters) with complexity according to value written or read  Both WriteMax and ReadMax of value v take O(min(log v, n)) steps 23

Unbalanced tree MaxReg 0 … switch MaxReg 0 24 Bentley and Yao [1976] switch MaxReg 0 Leaf i is at depth O(log i)

Unbounded max register MaxReg 0 … switch Snapshot-based counter switch MaxReg 0 WriteMax and ReadMax of v in O(min(log v, n)) steps 25

Lower bound of min(log m, n-1)  S m = {executions with WriteMax operations up to value m by p 1 …,p n-1, followed by one ReadMax operation by p n }  T(m,n) = worst case cost of ReadMax in S m 26 p n reads

Lower bound of min(log m, n-1)  No process takes steps after p n so p n does not write  Reads a fixed register R. Did anyone write to R?  k = minimal such that there is a write to R in S k  No one in S k-1 writes to R so T(m,n)≥T(k-1,n)+1 27 p n reads R

Lower bound of min(log m, n-1)  In addition, consider a run in S k that writes to R 28 write to R by p i Finish writes except by p i Execution withwrites in {k,…,m} write to R by p i T(m,n) ≥ T(m-k+1,n-1)+1 p n returns maximal value from {k,…,m} p n reads Solve recurrence: T(m,n) ≥ 1+ min k {max(T(k-1,n), T(m-k+1,n-1))}, we had T(m,n)≥T(k-1,n)+1 R R p n reads

Summary  Implementation of max registers with O(min(log v, n)) steps per operation writing or reading the value v  Sub-linear implementation of counters  Extension of counters to any monotone circuit with monotone consistency instead of linearizability 29

Summary  Lower bounds  An alternative proof for JTT  Tight lower bound for max registers  Randomized lower bound Further research: randomized algorithm? Take-home message: Lower bounds do not always have the final say 30