Digital Design: Principles and Practices Chapter 4 Combinational Logic Design Principles

Introduction Combinational Logic Circuit  Outputs depend only on current inputs  Example: The rotary channel selector knob on an old-fashioned TV Sequential Logic Circuit  Outputs depend on current inputs and on past inputs  Feedback loop  Example: The channel selector controlled by the up and down pushbuttons on a TV remote control 2

Introduction (cont’d) Analysis  Logic diagram  Formal description of the function Synthesis  Formal description  Logic diagram Combinational circuits may have one or more outputs. In this chapter, we focus on single-output circuits. 3

4.1 Switching Algebra

Boolean Algebra Invented by English mathematician George Boole in 1854 Two-valued algebraic system  0 or 1 (LOW or HIGH) Symbolic variables (such as W, X, Y, and Z) are used The opposite (or complement) of an input signal level  We use a prime (’) to denote an inverter’s function Logic multiplication  Logical AND: ( ． ) Logical addition  Logical OR: ( + ) 5

Algebraic Notation for Logic Gates 6

Axiom The axioms (or postulates) of a mathematical system are a minimal set of basic definitions that we assume to be true, from which all other information about the system can be derived. 7

Axiom (cont’d) An axiom is any mathematical statement that serves as a starting point from which other statements are logically derived. Unlike theorems, axioms (unless redundant) cannot be derived by principles of deduction, nor are they demonstrable by mathematical proofs, simply because they are starting points; there is nothing else from which they logically follow (otherwise they would be classified as theorems). (Source: 8

Axioms (A1)X = 0 if X ≠ 1 (A1’)X = 1 if X ≠ 0 (A2)If X = 0, then X’ = 1 (A2’)If X = 1, then X’ = 0 (A3) 0 ． 0 = 0 (A3’)1 + 1 = 1 (A4) 1 ． 1 = 1 (A4’)0 + 0 = 0 (A5) 0 ． 1 = 1 ． 0 = 0 (A5’)1 + 0 = = 1 9

Theorems (One Variable) 10

Perfect Induction To prove theorem T1 ( X + 0 = X ):  [X = 0] = 0 (true, according to axiom A4’)  [X = 1] = 1 (true, according to axiom A5’) 11

Theorems (2 or 3 Variables) 12

Proofs Theorem T9 Theorem T11 Replace each variable with an arbitrary logic expression:  (X + Y’) + Z’ = X + (Y’ + Z’) (based on T7)  (V’ + X) ． (W ． (Y’ + Z)) + (V’+X) ． (W ． (Y’+Z))’ = V’ + X (based on T10) 13

Theorems ( n variables) 14

DeMorgan’s Theorems Theorem T13 15

DeMorgan’s Theorems Theorem T13’ 16

DeMorgan’s Theorems – An Example F(W, X, Y, Z) = (W’ ． X) + (X ． Y) + (W ． (X’ + Z’)) Prove that: [F(W, X, Y, Z)]’ = (W + X’) ． (X’ + Y’) ． (W’ + (X ． Z)) 17

Duality The primed version of each axiom (e.g., A5’) is obtained from the unprimed version (e.g., A5) by simply swapping 0 and 1 and, if present, “ ． ” and “ + ”. Metatheorem  A metatheorem is a theorem about theorems. Principle of Duality Any theorem or identity in switching algebra remains true if 0 and 1 are swapped and “ ． ”and “+” are swapped throughout. 18

Operator Precedence Logic AND ( ． ) has higher precedence than Logic OR ( + ). Apply Principle of Duality on Theorem T9  X + X ． Y = X [T9]  X + (X ． Y ) = X  X ． (X + Y) = X [T9’] 19

Truth Table 20 The truth table for an n -variable logic function has 2 n rows.

Definitions Literal Product term Sum-of-products (SOP) expression Sum term Product-of-sums (POS) expressions Normal term Minterm Maxterm 21

Literal A literal is a variable or the complement of a variable. Examples:  X  Y  X’  Y’ 22

Product Term A product term is a single literal or a logical product (‘ ． ’) of two or more literals. Examples:  Z’  W ． X ． Y  X ． Y’ ． Z  W’ ． Y’ ． Z 23

Sum-of-Products (SOP) Expression A sum-of-products expression is a logical sum of product terms. Examples:  Z’ + W ． X ． Y + X ． Y’ ． Z + W’ ． Y’ ． Z 24

Sum Term A sum term is a single literal or a logical sum of two or more literals. Examples:  Z’  W + X + Y  X + Y’ + Z  W’ + Y’ + Z 25

Product-of-Sums (POS) Expression A product-of-sums expression is a logical product of sum terms. Examples:  Z’ ． (W + X + Y) ． (X + Y’ + Z) ． (W’ + Y’ + Z) 26

Normal Term A normal term is a product or sum term in which no variable appears more than once. Examples of non-normal terms:  W ． X ． X ． Y’  W + W + X’ + Y Examples of normal terms:  W ． X ． Y’  W + X’ + Y 27

Minterm An n -variable minterm is a normal product term with n literals. Examples (4-variable minterms):  W’ ． X’ ． Y’ ． Z’  W ． X ． Y’ ． Z  W’ ． X’ ． Y ． Z’ 28

Maxterm An n -variable maxterm is a normal sum term with n literals. Examples (4-variable maxterms):  W’ + X’ + Y’ + Z’  W + X’ + Y’ + Z  W’ + X’ + Y + Z’ 29

Minterms and Maxterms 30

Canonical Sum The canonical sum of a logic function is a sum of minterms corresponding to truth-table rows (input combinations) for which the function produces a logic ‘1’ output. Table 4-5: F = X’ ． Y’ ． Z’ + X’ ． Y ． Z + X ． Y’ ． Z’ + X ． Y ． Z’ + X ． Y ． Z 31

Minterm List ( Σ notation) Table 4-5: F = Σ X,Y,Z ( 0,3,4,6,7 ) 32

Canonical Product The canonical product of a logic function is a product of the maxterms corresponding to input combinations for which the function produces a logic ‘0’ output. Table 4-5: F = (X + Y + Z’) ． (X + Y’ + Z) ． (X’ + Y + Z’) 33

Maxterm List ( Π notation) Table 4-5: F = Π X,Y,Z ( 1,2,5 ) 34

We Have Learned … Five possible representations for a combinational logic function: 1)Truth Table 2)Canonical sum (a type of SOP expression) 3)Minterm list ( Σ notation) 4)Canonical product (a type of POS expression) 5)Maxterm list ( Π notation) 35

4.2 Combinational-Circuit Analysis

A 3-Input, 1-Output Logic Circuit 37

A 3-Input, 1-Output Logic Circuit (cont’d) 38

A 3-Input, 1-Output Logic Circuit (cont’d) 39 F = ( (X + Y’) ． Z) + (X’ ． Y ． Z’) = X ． Z + Y’ ． Z + X’ ． Y ． Z’

A 3-Input, 1-Output Logic Circuit (cont’d) 40 F = ( (X + Y’) ． Z) + (X’ ． Y ． Z’) = X ． Z + Y’ ． Z + X’ ． Y ． Z’

A 3-Input, 1-Output Logic Circuit (cont’d) 41 F = ( (X + Y’) ． Z) + (X’ ． Y ． Z’) = X ． Z + Y’ ． Z + X’ ． Y ． Z’ = (X + Y’ + Z’) ． (X’ + Z) ． (Y + Z)

A 3-Input, 1-Output Logic Circuit (cont’d) 42

Logic Circuits with Equivalent Function 43

Logic Circuits with Equivalent Function 44

Logic Circuits with Equivalent Function 45

4.3 Combinational-Circuit Synthesis

Combinational Circuit Synthesis Hardware Description Language (HDL)  Verilog, VHDL  Circuit synthesis software (automatic circuit synthesis) Target Devices  FPGA  ASIC cell library Circuit synthesis by hand 47

A 4-bit Prime-Number Detector Given a 4-bit input combination N = N 3 N 2 N 1 N 0, produce a 1 (HIGH) output for N = 1, 2, 3, 5, 7, 11, 13, and 0 (LOW) otherwise. Answer: F = Σ N3,N2,N1,N0 (1, 2, 3, 5, 7, 11, 13) = N 3 ’ ． N 2 ’ ． N 1 ’ ． N 0 + N 3 ’ ． N 2 ’ ． N 1 ． N 0 ’ + N 3 ’ ． N 2 ’ ． N 1 ． N 0 + N 3 ’ ． N 2 ． N 1 ’ ． N 0 + N 3 ’ ． N 2 ． N 1 ． N 0 + N 3 ． N 2 ’ ． N 1 ． N 0 + N 3 ． N 2 ． N 1 ’ ． N 0 48

A 4-bit Prime-Number Detector (cont’d) 49

Circuit Manipulations Any sum-of-produces (SOP) expression can be realized as:  An AND-OR circuit; or  A NAND-NADN circuit Any product-of-sums (POS) expression can be realized as:  An OR-AND circuit; or  A NOR-NOR circuit In most logic technologies, inverting gates (like NAND and NOR) are faster than noninverting gates like AND and OR. 50

Circuit Manipulations - SOP 51

Circuit Manipulations - SOP 52

Circuit Manipulations - POS 53

Circuit Manipulations 54

Theorems (2 or 3 Variables) 55

F = Σ N3,N2,N1,N0 (1, 2, 3, 5, 7, 11, 13) = ( N 3 ’ ． N 2 ’ ． N 1 ’ ． N 0 + N 3 ’ ． N 2 ’ ． N 1 ． N 0 ) + ( N 3 ’ ． N 2 ． N 1 ’ ． N 0 + N 3 ’ ． N 2 ． N 1 ． N 0 ) + … = ( N 3 ’ ． N 2 ’ ． N 0 ) + ( N 3 ’ ． N 2 ． N 0 ) + … = N 3 ’ ． N 0 56 Combinational-Circuit Minimization (The Prime-Number Detector)

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Karnaugh Map (K-map) Phonetic Pronunciation: KAR-no Pronounce The Karnaugh Map for an n -input logic function is an array with 2n cells, one for each possible input combination or minterm. The small number inside each cell is the corresponding minterm number in the truth table. To represent a logic function on a Karnaugh map, we simply copy 1s and 0s from the truth table or equivalent to the corresponding cells of the map. 58

Karnaugh Map 59

Karnaugh Map 60

Karnaugh Map 61

Minimized Circuit 62

Karnaugh Map 63

使用 K-map 做邏輯簡化 - Summary ( 簡化為 Minimum SOP Expression) 1) 每 2 i 個 cells 一組 2) 每一組內的所有 cells 都必須為 1 ( 或是 don’t cares ) 3) 每一組在 K-map 上必須為長方形 / 正方形 4) 每一組 ( 長方形 ) 必須要盡可能的愈大愈好 5) 每個 K-map 上的 1 都要被涵蓋 6) 愈少組愈好 64

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Karnaugh Map 66

Karnaugh Map 67

Karnaugh Map 68

Karnaugh Map 69

Karnaugh Map 70

71 Karnaugh Map

Minimal Sum A minimal sum of a logic function F(X 1, …, X n ) is a sum-of- products (SOP) expression for F such that no SOP expression for F has fewer product terms, and any SOP expression with the same number of product terms has at least as many literals.  Minimal SOP expression  Minimum SOP expression 72

Prime Implicant A logic function P(X 1, …, X n ) implies a logic function F(X 1, …, X n ) if for every input combination such that P = 1, then F = 1.  P F  F includes P,  F covers P A prime implicant of a logic function F(X 1, …, X n ) is a normal product term P(X 1, …, X n ) that implies F, such that if any variable is removed from P, then the resulting product term does not imply F. [Prime-Implicant Theorem] A minimal sum is a sum of prime implicants. 73

K-Map Simplification of SOP Expressions EXAMPLE 4-28 Use a Karnaugh map to minimize the following (standard) SOP expression: Ans: B’ + A’ ． C 74

K-Map Simplification of SOP Expressions EXAMPLE 4-29 Use a Karnaugh map to minimize the following SOP expression: Ans: D’ + B’ ． C 75

K-Map Simplification of SOP Expressions EXAMPLE 4-29 (Related Problem) Use a Karnaugh map to simplify the following SOP expression: Ans: X’Y’Z’ + WX’Z + W’YZ 76

Converting Between POS and SOP EXAMPLE 4-33 Using a Karnaugh map, convert the following standard POS expression into a minimum POS expression and a minimum SOP expression. Ans: Minimum POS: (A+B+C’)(B’+C+D)(B+C+D’) Minimum SOP: AC + BC + BD +B’C’D’ 77

“Don’t Care” Condition 78

K-map with “don’t cares” 79 EXAMPLE: Write the minimum SOP expression for the following Karnaugh map (Note that the ‘X’s in the truth table denote don’t care terms.): CD AB XX X0X 10 X011

K-map with “don’t cares” 80 EXAMPLE: Write the minimum SOP expression for the following Karnaugh map (Note that the ‘X’s in the truth table denote don’t care terms.):

5-Variable Karnaugh Map 81

5-Variable Karnaugh Map 82 Ans: DE’ + B’CE + A’BD’ + BC’D’E