Implementing a 10 Gb/s VCSEL Driven Transmitter for Short Range Applications Irfan N. Ali Michael C. Clowers David S. Fink Sean K. Garrison Jeff A. Magee Georgia Institute of Technology School of Electrical & Computer Engineering March 3, 2008
Project Objectives & Parameters Objective: Design and implement 10 Gb/s VCSEL transmitter for fiber optic Ethernet systems Client: Telecom service providers, server management groups, etc. Projected Unit Cost: Approx. $700
Design and implement a 10 Gb/s optical link Digital/electrical input Signal processing via laser driver Electrical-Optical Signal conversion via VCSEL Analog/optical output Fiber optic data transmission Bit-error-ratio tester (BERT) Technical Objectives Laser Driver VCSEL Fiber Optic Cable Pattern Generator BERT Driver BoardInterface Board
Technical Specifications
Design Approach Three parallel approaches: Modify MAXIM Inc. evaluation board Populate existing Analog Devices (AD) driver board Design driver board for TI chip Laser Driver VCSEL Digital Input I MOD I BIAS
Analog Devices Board Pre-designed board Needs to be populated and tested Has analog control of output currents Laser Driver Digital Inputs Output to VCSEL
Maxim Inc. Evaluation Board Evaluation board designed for laser diode Interface board designed to deliver limited modulation and bias currents to VCSEL Digital Inputs Laser Driver Tuning Potentiometers Output to Interface Board
TI Driver Board Schematic Driver board designed using PCB Artist Provides digital control of output currents Works with an interface board to connect to VCSEL MCU Input Digital Inputs Power Supply Digital Outputs
VCSEL Interface Board Schematic Interfaces the TI and MAXIM Inc. boards with the VCSEL Includes resistance networks to limit current to VCSEL Digital Input Digital Inputs Analog VCSEL Output MAXIM Interface TI Interface
System Configuration Note: SMA connections use coax cables Optical cables use LC connectors
Demonstration Plan Test by using the transmitter with a pattern generator to a send 10 Gb/s signal to error detector connected to optical receiver Measure bit-error-ratio (BER) versus optical power at receiver and compare to acceptable value of BER at Capture optical eye diagram using a high-speed oscilloscope
Problems/Issues Transmission lines for interface board need to be designed for high speeds SMA pad size on AD board does not match the SMA connector specification VCSEL connection to AD board may be incompatible with available VCSELs TI driver chip has 0.5 mm spacing between pins which will be difficult to solder by hand
Budget & Cost Analysis TI MCUs were bought as general use for the Senior Design Lab and therefore will not come out of the budget Pre-designed PCB board provided free of charge from Dr. Ralph’s lab Costs are based on total unit sale of over 5 years
Projected Schedule Major Events Before Spring Break: Completing PCB design and fabrication Populating pre-designed board Testing at TSRB
Current Status MAXIM Inc. evaluation board acquired AD board partially populated TI and interface boards designed PCB mounting design initialized
Questions/Comments Thank You