Mixed-Mode BIST Based on Column Matching Petr Fišer

Outline  Introduction to BIST  State-of-the-art Methods  Mixed-Mode BIST  Column-Matching Method  Experimental Results  Conclusions  Publications on Column-Matching  Further Work

Introduction to BIST  Built-in Self-Test  Enables the device to test itself  Why (to) BIST?  With increasing integration density, the amount of manufacture faults is increasing  Thus, we have to test the chip  With increasing complexity of the design, it becomes impossible to test the chip externally  Thus, we HAVE to use BIST

Introduction to BIST The BIST Structure Generate test patternsGenerate test patterns Apply the patterns to the circuitApply the patterns to the circuit Evaluate the responseEvaluate the response

Introduction to BIST Two General Approaches to BIST Test-per-scanTest-per-scan Connect the CUT flip-flops into a scan chain Test the circuit serially Test-per-clockTest-per-clock Tests the circuit in parallel

Naive Methods  Exhaustive Testing  Generates all the 2 n patterns  Extremely slow – impossible to use  Pseudo-Random Testing  Apply several pseudo-random patterns to the CUT  Complete fault coverage is not achieved  BOM-based BIST  Test patterns are stored in ROM  Big area overhead

State-of-the-art Methods  Reseeding  The pseudo-random test patterns are generated by LFSR  More LFSR seeds are applied  Weighted Pattern BIST  Change the probability of occurrence of 1s and 0s in the PR sequence  Bit-Fixing, Bit-Flipping, Row-matching  Modify the PR patterns by additional logic

Mixed-Mode BIST Combination of pseudo-random and deterministic BIST

Column-Matching  LFSR produces code words  These have to be transformed into deterministic patterns (computed by ATPG) => Output Decoder

Column-Matching Basic Principle Try to reorder test patterns, so that most of the Decoder outputs will be implemented as wires – A MatchTry to reorder test patterns, so that most of the Decoder outputs will be implemented as wires – A Match This will be accomplished when the particular columns of the LFSR and test matrix will be equalThis will be accomplished when the particular columns of the LFSR and test matrix will be equal Direct match – even the Switch logic is eliminatedDirect match – even the Switch logic is eliminated

Column-Matching Mixed-Mode BIST 1. Simulate first n LFSR patterns 2. Determine undetected faults 3. Compute a test for them (APTG) 4. Make a decoder producing test from LFSR patterns > n

Column-Matching Mixed-Mode BIST Two separate test phases  pseudorandom  and deterministic

Column-Matching Example

Experimental Results Column- matching Bit-fixingRow-matching BenchTLGEsTLGEsTLGEs c880 1 K c K 15 3 K 11 2 K 0 c K K K 8 c K c K K 13 4 c K K K 297 s420 1 K s641 4 K K 12 6 s713 5 K s838 6 K K 37-- s

Conclusions  Column-matching-based mixed-mode BIST method has been presented  Pseudo-random LFSR patterns are being transformed into deterministic vectors generated by ATPG by the Decoder  We try to match as many of the Decoder outputs as possible with its inputs, which yields no logic necessary to implement these outputs  Mixed-mode – two disjoint BIST phases introduced

Publications  Fišer, P. - Hlavička, J.: Column-Matching Based BIST Design Method. Proc. 7th IEEE Europian Test Workshop (ETW'02), Corfu (Greece), , pp  Fišer, P. - Hlavička, J. - Kubátová, H.: Column-Matching BIST Exploiting Test Don't-Cares. Proc. 8th IEEE Europian Test Workshop (ETW'03), Maastricht (The Netherlands), , pp  Fišer, P. - Kubátová, H.: An Efficient Mixed-Mode BIST Technique, Proc. 7th IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop 2004 (DDECS'04), Tatranská Lomnica, SK, , pp  Fišer, P. - Kubátová, H.: Survey of the Algorithms in the Column-Matching BIST Method, Proc. 10th International On- Line Testing Symposium 2004 (IOLTS'04), Madeira, Portugal, , pp. 181  Fišer, P. - Kubátová, H.: Pseudorandom Testability - Study of the Effect of the Generator Type, ECI'04, Herľany, SR,  Fišer, P. - Kubátová, H.: Influence of the Test Lengths on Area Overhead in Mixed-Mode BIST, BEC'04, Tallinn (Estonia),

Further Work  Use more sophisticated structures instead of a LFSR (cellular automata)  Adjust the width of a PRPG  Incorporate the ATPG into the design process – iterative test computation  Test-per-scan support  Partitioning of the CUT  Combine CM-BIST with other methods