TM Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc Slide 0
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc TM Erwin J. Prinz, Ph.D. Device Engineer The Zen of Nonvolatile Memories July 27, 2006Paper 47.3
Slide 2 Acknowledgements Ko-Min Chang, Craig Swift NVM Device Engineering Thomas Jew, Ronnie Syzdek NVM Design Saied Tehrani, Jon Slaughter MRAM Technology Freescale TSO NVM Team Device, Process, Design, Reliability, Test
Slide 3 Outline Introduction Floating Gate Nonvolatile Memories Nitride Charge Storage Nanocrystal Charge Storage Emerging NVM Concepts Conclusions
Slide 4 Introduction Silicon Nonvolatile Memories (NVM) store Code Data Technology Driver for Scaling More bits shipped in 2006 than DRAM Rugged, secure, reliable Engine, transmission, …
Slide 5 Types of Nonvolatile Memories
Slide 6 Nonvolatile Memory Moore’s Law Example: Engine & Transmission Controller
Slide 7 System on Chip with Emb. NVM Engine / Transmission Controller 32-bit CPU Core 1 Mbit Embedded Flash A/D Converter Peripherals The Ultimate System on a Chip Freescale’s MPC565 PowerPC TM Microprocessor
Slide 8 System on Chip with Emb. NVM CPU – Bus – NVM LV / high speed Pad Ring I/O (2.5V or 3.3V) NVM Bitcells HV / statistics NVM Periphery Analog NVM HV Supplies Charge pumps
Slide 9 System on Chip with Emb. NVM CPU – Bus – NVM LV / high speed Pad Ring I/O (2.5V or 3.3V) NVM Bitcells HV / statistics NVM Periphery Analog NVM HV Supplies Charge pumps
Slide 10 System on Chip with Emb. NVM CPU – Bus – NVM LV / high speed Pad Ring I/O (2.5V or 3.3V) NVM Bitcells HV write, statistics NVM Periphery Analog NVM HV Supplies Charge pumps
Slide 11 System on Chip with Emb. NVM CPU – Bus – NVM LV / high speed Pad Ring I/O (2.5V or 3.3V) NVM Bitcells HV / statistics NVM Periphery Analog NVM HV Supplies Charge pumps
Slide 12 System on Chip with Emb. NVM Many device types LV, I/O, HV, NVM Many design styles Memory Analog HV Switch Synthesized Logic Many Design Tools !! SoC design flow NVM Reliability Modeling Bitcell Modeling Freescale’s MPC565 PowerPC TM Microprocessor
Slide 13 Traditional NVM Operation
Slide 14 Floating Gate NVM Operation
Slide 15 NAND NOR
Slide 16 Floating Gate Scaling Limit
Slide 17 High Reliability Aspect of NVM End-of Life Bitcell Modeling Knowledge of failure modes Interaction of Bitcell with NVM Design Calibrated Tools Failure Rate Prediction for SoC Zero Defects
Slide 18 1-Transistor vs. Split Gate Bitcell
Slide 19 Limitation of High Read Voltage 1-Transistor Array Split Gate Array
Slide 20 Nitride Charge Storage (SONOS)
Slide 21 Virtual Ground Array
Slide 22 Silicon Nanocrystal NVM 5-10 nm diameter “nanocrystals”
Slide 23 Silicon Nanocrystal Formation Manufacturable in RT-CVD Tool
Slide 24 Novel Device Concepts …
Slide 25 … and Experimental Results
Slide 26 Revolutionary Memory: MRAM Information stored as magnetic polarization Detected as a resistance R MIN or R MAX Isolation transistor can be logic device, no high on/off ratio needed Bit cell size competitive with embedded DRAM 4 Mbit MRAM in production now !
Slide 27 Other Novel Methods of NVM FeRAM Bitcell Scalability ? Phase Change Memory Data Retention at Elevated Temperatures ? Resistive RAM Device Understanding ?
Slide 28 Conclusions Floating gate NVM scalable to 65 nm or 45 nm SONOS, nanocrystal Flash to 32 nm Revolutionary, more universal memories being developed Require killer application for deployment Challenges in design, verification, reliability, test, manufacturing …