Computer Architecture Mid-term review Ralph Grishman Oct NYU

Grade distribution 100’s2 9º’s9 80’s11 70’s3 60’s4 50’s2 40’s1 30’s1 10/26/15Computer Architecture Midterm Solutions2

Question #1 freq = 1 / clock period = 1 / 500 ps = 1 / (500 * sec) = 1 / (0.5 * sec) = 2 * 10 9 Hz = 2 GHz (no part credit) 10/26/15Computer Architecture Midterm Solutions3

Question #3 if input is a b c output is (a AND (NOT b) AND (NOT c)) OR ((NOT a) AND b AND (NOT c)) OR ((NOT a) AND (NOT b) AND c) 10/26/15Computer Architecture Midterm Solutions4

Question #4 9 inputs – two-level tree – delay = 200 ps N inputs – # of gates = N/2 lose 1 pt for power series (not as informative) – delay = 100 ps * log 3 N 10/26/15Computer Architecture Midterm Solutions5

Question #5 ripple carry – optimal Full Adder Cin  Cout is 2 gate delays = 20 ps using Cout = (A and B) or (A and Cin) or (B and Cin) small penalty for using sub-optimal FA – 16-bit adder takes 16 * 20 ps = 320 ps carry look-ahead – 16-bit adder takes 8 gate delays = 80 ps – formulas in class notes 10/26/15Computer Architecture Midterm Solutions6

Question #6: Transition table currentnext /26/15Computer Architecture Midterm Solutions7

Question #6: Formulas next1 = current0 next0 = NOT current1 10/26/15Computer Architecture Midterm Solutions8

Question #6: circuit requires FFs (not latches) 10/26/15Computer Architecture Midterm Solutions9 current1 current0 not clock

Question #7 D-type latch – all four outputs change to 1 FF – only first output changes (result = ) 10/26/15Computer Architecture Midterm Solutions10

Question #8 slt$5,$2,$3 bne $5,$0,twoIsSmaller or $4,$2,$2 jdone twoIsSmaller:or$4,$3,$3 done: 10/26/15Computer Architecture Midterm Solutions11