1/5 ECAL/HCAL Front-end status Calorimeter Meeting Frédéric Machefert Wednesday February 9 th, 2011.

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Presentation transcript:

1/5 ECAL/HCAL Front-end status Calorimeter Meeting Frédéric Machefert Wednesday February 9 th, 2011

2/5 Status and intervention In December and January, several interventions took place in order to Replace faulty boards on the detector Fix problems on the spares Correct any bad PMT cable connection List of faulty channels was established with the help of Irina and Yuri (thanks!) The intervention in mid-January was done with Christophe and Daniel from LAL The repairs of Front-end boards have been done with the help of the electronics service at CERN Replacement of components AX FPGA Repair of a broken via Big APA FPGA (Seq) Possible But problem remained Delay chip Repair of PCB to be done Broken via FPGA Introduction of a thin wire FPGA

3/5 Status in the pit 2 faulty boards had been replaced in December in HCAL A noisy channel A channel has a problem for a specific setting of the timing (next slide) Systematic test of the ECAL/HCAL crates The system is fragile (connectors) Any intervention on a crate (board removal) may cause a connection failure Several cables had been fixed by pulling on the connection Try to identify the cause 2 cables Crate 11 – Slot 08 – PM 5 (Readout 9) Crate 11 – Slot 18 – PM 4 (Readout 1) have been repaired (ECAL) Cable cut - Connector replaced Overall check is fine for ECAL/HCAL Still observed one unexpectedly noisy channel in HCAL. Weak connection (ground) Cable Ground Metallic cylinder (ground) Signal insulator

4/5 A strange channel... FEB 253 was noisy last year removed from the pit Test on the test bench No problem identified Board flagged as correct (spare) Kept track of the suspicious functioning The board has been put back in the pit in January to replace a faulty one No problem with CAT A Noisy channel by using LED tests (same as last year) ! After some tests LED OK for all the time settings except “7” (never seen anything similar!) CAT tests performed at “7” exhibit the problem Delay Chip (debug to be resumed this week) Never observed such a problem before Should use the same timing as in the pit when a problem does not appear

5/5 Status of the Spare Total of 9 spare FEB 5 spare boards (gray handle) 2 spare boards (black handle) 2 spare boards with specific TVB constraints Incompatibilities have been observed between FEB and TVB Reason not really understood : observed in HCAL → TVB connections A board has a faulty Sequencer Component warms up Changed recently → no difference Debugging has to continue A board had a missing bit Identified as due to the FPGA FPGA replaced → new ECS problem FPGA removed → PCB affected PCB has to be replaced before a new FPGA can be soldered Board is still at the electronics service to be fixed A board has a faulty Trigger BGA Plan to keep it as it is and use it as a pin-diode if needed (→ extra spare) A board has a timing problem → to be debugged