Chapter 5: Computer Systems Design and Organization Dr Mohamed Menacer Taibah University 2007-2008.

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Presentation transcript:

Chapter 5: Computer Systems Design and Organization Dr Mohamed Menacer Taibah University

Understanding Structure and Function of Digital Computer Multiple levels of computer operation Application level Application level High Level Language(s), HLL, level(s) High Level Language(s), HLL, level(s) Assembly/machine language level: instruction set Assembly/machine language level: instruction set System architecture level: subsystems & connections System architecture level: subsystems & connections Digital logic level: gates, memory elements, buses Digital logic level: gates, memory elements, buses Electronic design level Electronic design level Semiconductor physics level Semiconductor physics level

Von Neumann/Turing Stored Program concept Main memory storing programs and data ALU operating on binary data Control unit interpreting instructions from memory and executing Input and output equipment operated by control unit Princeton Institute for Advanced Studies (IAS) Completed 1952

Structure of von Neumann machine

CPU - details 1000 x 40 bit words Binary number Binary number 2 x 20 bit instructions 2 x 20 bit instructions Operation code (Opcode) (8 bits) + address (12 bits) Set of registers (storage in CPU) Memory Buffer Register (MBR) Memory Buffer Register (MBR) Memory Address Register (MAR) Memory Address Register (MAR) Instruction Register (IR) Instruction Register (IR) Instruction Buffer Register (IBR) Instruction Buffer Register (IBR) Program Counter (PC) Program Counter (PC) Accumulator Accumulator Multiplier Quotient Multiplier Quotient

Computer Structure

Computer Evolution Over 50 years, computers have evolved from memory size of 1 kiloword (1024 words) and clock periods of 1 millisecond (0.001 s.) from memory size of 1 kiloword (1024 words) and clock periods of 1 millisecond (0.001 s.) to memory size of a terabyte (2 40 bytes) and clock periods of 100 ps. ( s.) and shorter to memory size of a terabyte (2 40 bytes) and clock periods of 100 ps. ( s.) and shorter More speed and capacity is needed for many applications, such as real-time 3D animation, various simulations

Intel First microprocessor First microprocessor All CPU components on a single chip All CPU components on a single chip 4 bit 4 bit Followed in 1972 by bit 8 bit Both designed for specific applications Both designed for specific applications Intel’s first general purpose microprocessor Intel’s first general purpose microprocessor

Speeding it up Pipelining On board cache On board L1 & L2 cache Branch prediction Data flow analysis Speculative execution

Performance Balance Processor speed increased Memory capacity increased Memory speed lags behind processor speed

Logic and Memory Performance Gap

Intel Microprocessor Performance

I/O Devices Peripherals with intensive I/O demands Large data throughput demands Processors can handle this Problem moving data Solutions: Caching Caching Buffering Buffering Higher-speed interconnection buses Higher-speed interconnection buses More elaborate bus structures More elaborate bus structures Multiple-processor configurations Multiple-processor configurations

Typical I/O Device Data Rates

Improvements in Chip Organization and Architecture Increase hardware speed of processor Fundamentally due to shrinking logic gate size Fundamentally due to shrinking logic gate size More gates, packed more tightly, increasing clock rate Propagation time for signals reduced Increase size and speed of caches Dedicating part of processor chip Dedicating part of processor chip Cache access times drop significantly Change processor organization and architecture Increase effective speed of execution Increase effective speed of execution Parallelism Parallelism

Problems with Clock Speed and Logic Density Power Power density increases with density of logic and clock speed Power density increases with density of logic and clock speed Dissipating heat Dissipating heat RC delay Speed at which electrons flow limited by resistance and capacitance of metal wires connecting them Speed at which electrons flow limited by resistance and capacitance of metal wires connecting them Delay increases as RC product increases Delay increases as RC product increases Wire interconnects thinner, increasing resistance Wire interconnects thinner, increasing resistance Wires closer together, increasing capacitance Wires closer together, increasing capacitance Memory latency Memory speeds lag processor speeds Memory speeds lag processor speedsSolution: More emphasis on organizational and architectural approaches More emphasis on organizational and architectural approaches

Increased Cache Capacity Typically two or three levels of cache between processor and main memory Chip density increased More cache memory on chip More cache memory on chip Faster cache access Pentium chip devoted about 10% of chip area to cache Pentium 4 devotes about 50%

More Complex Execution Logic Enable parallel execution of instructions Pipeline works like assembly line Different stages of execution of different instructions at same time along pipeline Different stages of execution of different instructions at same time along pipeline Superscalar allows multiple pipelines within single processor Instructions that do not depend on one another can be executed in parallel Instructions that do not depend on one another can be executed in parallel

Diminishing Returns Internal organization of processors complex Can get a great deal of parallelism Can get a great deal of parallelism Further significant increases likely to be relatively modest Further significant increases likely to be relatively modest Benefits from cache are reaching limit Increasing clock rate runs into power dissipation problem Some fundamental physical limits are being reached Some fundamental physical limits are being reached

New Approach – Multiple Cores Multiple processors on single chip Large shared cache Large shared cache Within a processor, increase in performance proportional to square root of increase in complexity If software can use multiple processors, doubling number of processors almost doubles performance So, use two simpler processors on the chip rather than one more complex processor With two processors, larger caches are justified Power consumption of memory logic less than processing logic Power consumption of memory logic less than processing logic Example: IBM POWER4 Two cores based on PowerPC Two cores based on PowerPC

POWER4 Chip Organization

Pentium Evolution (1) 8080 first general purpose microprocessor first general purpose microprocessor 8 bit data path 8 bit data path Used in first personal computer – Altair Used in first personal computer – Altair8086 much more powerful much more powerful 16 bit 16 bit instruction cache, prefetch few instructions instruction cache, prefetch few instructions 8088 (8 bit external bus) used in first IBM PC 8088 (8 bit external bus) used in first IBM PC Mbyte memory addressable 16 Mbyte memory addressable up from 1Mb up from 1Mb bit 32 bit Support for multitasking Support for multitasking

Pentium Evolution (2) sophisticated powerful cache and instruction pipelining sophisticated powerful cache and instruction pipelining built in maths co-processor built in maths co-processorPentium Superscalar Superscalar Multiple instructions executed in parallel Multiple instructions executed in parallel Pentium Pro Increased superscalar organization Increased superscalar organization Aggressive register renaming Aggressive register renaming branch prediction branch prediction data flow analysis data flow analysis speculative execution speculative execution

Pentium Evolution (3) Pentium II MMX technology MMX technology graphics, video & audio processing graphics, video & audio processing Pentium III Additional floating point instructions for 3D graphics Additional floating point instructions for 3D graphics Pentium 4 Note Arabic rather than Roman numerals Note Arabic rather than Roman numerals Further floating point and multimedia enhancements Further floating point and multimedia enhancementsItanium 64 bit 64 bit see chapter 15 see chapter 15 Itanium 2 Hardware enhancements to increase speed Hardware enhancements to increase speed See Intel web pages for detailed information on processors

Internet Resources Search for the Intel Museum Search for the Intel Museumhttp://