SDS Foil no 1 SDL – Inheritance

SDS Foil no 2 Controller behaviour to Central Validation Idle Code (cid,PIN) Code(cid, PIN) via U Validation virtual OK to cur_panel cur_panel := sender NOK to cur_panel Idle process type Controller dcl cur_panel PId ; /* current panel whose Code will be validated */ dcl cid, PIN integer ; /* temporary variables for the data attributes of 'Code' */ 1(2) [Code] [(validity)] [opened,closed] [open,close] [(validity)] [Code] P D U Opening Open /* to Door */

SDS Foil no 3 Behaviour inheritance process type BlockingController inherits Controller 1(1) * Disable BlockDoor blocked Enable Idle U [Disable,Enable] * BlockDoor For all states Add transition To new state Add signals «process» controller «process» BlockingController

SDS Foil no 4 Inherited behaviour to Central Validation Idle Code (cid,PIN) Code(cid, PIN) via U Validation virtual OK to cur_panel cur_panel := sender NOK to cur_panel Idle process type Controller dcl cur_panel PId ; /* current panel whose Code will be validated */ dcl cid, PIN integer ; /* temporary variables for the data attributes of 'Code' */ 1(2) [Code] [(validity)] [opened,closed] [open,close] [(validity)] [Code] P D U Opening Open /* to Door */

SDS Foil no 5 Who can interwork correctly? a:controller u b:blocking controller u c:validation d:blocking validation

SDS Foil no 6 code OK NOK opened closed Idle Validation Controller blockingController code OK NOK opened closed Disable Enable Validation Idle Controller Blocked Subtyping for states and transitions

SDS Foil no 7 e [(inp)] [(outp)] block type BlockingAccessPoint 1(1) Door [(validity)] [code] [opened, closed] [open, close] [(inp)] [(outp)] [(validity)] [Code] P1 signal opened,closed ; /* Door -> Controller */ signal open, close ; /* Controller -> Door */ CE CU D C [(validity)] [Code] apc: Blocking Controller P D U Panel [unlock, lock] d [unlock, lock] [isOpen, isClosed] [isOpen, isClosed] BlockingController Using the Blocking controller – the BlockingAccessPoint could we define this by inheriting from AccessPoint?

SDS Foil no 8 «block» AccessPoint «block» BlockingAccessPoint «block» LoggingAccessPoint Inheritance: pure extension «process» controller «process» BlockingController «process» LoggingController Note that this is valid SDL-2000 notation!

SDS Foil no 9 «block» AccessPoint «block» BlockingAccessPoint «block» LoggingAccessPoint Inheritance: virtual to enable changes «process» controller {virtual} «process» Controller {redefined} «process» Controller {finalised}

SDS Foil no 10 Virtual process in modified AccessPoint e [(outp)] block type AccessPoint 1(1) Door [(validity)] [code] [opened, closed] [open, close] [(inp)] [(outp)] [(validity)] [Code] P1 signal open, close ; /* Controller -> Door */ signal opened, closed ; /* Door -> Controller */ CE CU D C [(validity)] [Code] apc: Controller P D U Panel [unlock, lock] d [unlock, lock] [isOpen, isClosed] [isOpened, isClosed] Virtual Controller [(inp)]

SDS Foil no 11 Virtual process Validation Code (cid,PIN) Code(cid,PIN ) via U Validation OK to cur_panel Idle cur_panel := sender unlockDoor NOK to cur_panel Idle virtual process type Controller dcl cur_panel PId ; /* current panel whose Code will be validated */ dcl cid, PIN integer ; /* temporary variables for the data attributes of 'Code' */ 1(1) [Code] [(validity)] [opened,closed] [open,close] [(validity)] [Code] P D U Idle OK NOK

SDS Foil no 12 redefined C [Enable, Disable] block type blockingAccessPoint inherits AccessPoint Controller existing gate added signals Inheriting AccessPoint: BlockingAccessPoint Note that the full structure of AccessPoint is inherited here!

SDS Foil no 13 Inherited structure e [(outp)] block type AccessPoint 1(1) Door [(validity)] [code] [opened, closed] [open, close] [(inp)] [(outp)] [(validity)] [Code] P1 signal open, close ; /* Controller -> Door */ signal opened, closed ; /* Door -> Controller */ CE CU D C [(validity)] [Code] apc: Controller P D U Panel [unlock, lock] d [unlock, lock] [isOpen, isClosed] [isOpened, isClosed] Virtual Controller [(inp)]

SDS Foil no 14 Redefined process type: Controller in blocking AccessPoint redefined process type Controller1(1) * Disable BlockDoor blocked Enable Idle U [Disable,Enable] *

SDS Foil no 15 blocktype loggingAccessPoint inherits AccessPoint 1(1) finalised Controller apc: Controller LogDevice [(validity),Code] L LD existing instance added signalroute Inheriting structure: LoggingAccessPoint added process «block» AccessPoint «block» LoggingAccessPoint

SDS Foil no 16 Virtual process with virtual transitions Validation Code (cid,PIN) Code(cid,PIN ) via U Validation OK to cur_panel Idle cur_panel := sender unlockDoor NOK to cur_panel Idle virtual process type Controller dcl cur_panel PId ; /* current panel whose Code will be validated */ dcl cid, PIN integer ; /* temporary variables for the data attributes of 'Code' */ 1(1) [Code] [(validity)] [opened,closed] [open,close] [(validity)] [Code] P D U Idle OK NOK virtual

SDS Foil no 17 OK to cur_panel via P Idle unlockDoor NOK to cur_panel via P Idle NOK finalised process type controller1(1) [Code, (validity)] L Validation Redefined and finalized transitions redefinedfinalized OK, Code(cid,PIN) via L NOK, Code(cid,PIN) via L «process» controller {virtual} «process» controller {finalised}

SDS Foil no 18 Virtual Procedures virtual whenOK virtual whenNotOK unlockDoor Validation Idle Code (cid,PIN) Code(cid,PIN ) via U Validation OK cur_panel := sender NOK process type Controller dcl cur_panel PId ; /* current panel whose Code will be validated */ dcl cid, PIN integer ; /* temporary variables for the data attributes of 'Code' */ 1(1) [Code] [(validity)] [opened,closed] [open,close] [(validity)] [Code] P D U Idle unlockDoor Idle whenOK whenNotOK

SDS Foil no 19 process type loggingController inherits Controller L [Code,OK,NOK] redefined WhenOK redefined WhenNOK Redefining virtual procedures

SDS Foil no 20 CentralUnit Building a system from components system type AccessControl use AccessPointLib ap(100): AccessPoin t ce d bp(10): Blocking AccessPoin t ce d lp(20): Logging AccessPoint ce d [(inp)] [(outp)] unlock, lock isOpen, isClosed [(validity)][Code] [(inp)] [(outp)] unlock, lock isOpen, isClosed [(validity), Disable, Enable] [Code] [(validity)][Code] [(inp)] [(outp)] unlock, lock isOpen, isClosed

SDS Foil no 21 package AccessPointLib AccessPointBlockingAccessPoint use SignalLib ; LoggingAccessPoint The Block types in the AccessPointLib Package

SDS Foil no 22 signal opened,closed ; /* Door to Controller */ signal open, close ; /* Controller to Door */ package SignalLib signal eject-card, lock, unlock input-card, isOpen, isClosed display, keys; signal Code(integer,integer); signal OK,NOK,ERR ; signallist validity = OK, NOK, ERR ; signallist outp = EjectCard, display; signallist inp = InputCard, keys ; /* AccessPoint /* ENV /* Display /* ENV /* AccessPoint /* CentralUnit to ENV */ to AccessPoint*/ to ENV */ to Keyboard */ to CentralUnit */ to AccessPoint */ signal Disable, Enable /* CentralUnit to BlockingAccessPoint */

SDS Foil no 23 system type GeneralAccessControl use SignalLib ; use PanelLib / PanelInterface; use DoorLib / DoorInterface; virtual process type Panel atleast PanelInterface virtual process type Door atleast DoorInterface virtual Doorvirtual Panel ls(10): AccessPoint CentralUnit CE C [(validity)][Code] e c [(inp)][(out)] package SystemTypes AccessPoint Specialisation of system types d

SDS Foil no 24 Redefined process type Panel inherits PanelInterface Redefined process type Door inherits DoorInterface redefined Doorredefined Panel system type MyAccessControl inherits GeneralAccessControl package SpecialSystemTypes use SystemTypes

SDS Foil no 25 system MAC: MyAccessControl useSpecialSystemTypes; System Instance

SDS Foil no 26 <SIGNAL OK,NOK,ERR,Code(integer,integer), ejectCard, inputCard, display, keys> [Code] e [(inp)] [(outp)] virtual Controller block type AccessPoint 1(1) Door [(validity)] [code] [opened, closed] [open, close] [(inp)] [(outp)] [(validity)] [Code] P1 signal opened,closed ; /* Door -> Controller */ signal open, close ; /* Controller -> Door */ CE CU D C [(validity)] apc: Controller P D U Panel [unlock, lock] d [unlock, lock] [isOpen, isClosed] [isOpen, isClosed] signallist validity = OK, NOK, ERR ; signallist outp = eject-card, display; signallist inp = input-card, keys ; Context parameters

SDS Foil no 27 system AccessControl 1(1) CE C [(inp)] [(outp)] [(validity)][Code] ap(100): AccessPoint <Ja,Nei,Feil, Kode, KortUt, KortIn, Skjerm, Taster> C e CentralUnit Actual context parameters use AccessPointLib/AccessPoint; Actual context parameter

SDS Foil no 28 system AccessControl 1(1) CE C [(inp)] [(outp)] [(validity)][Code] CF [(validity), Enable, Disable] [Code] CB ap(apn ): AccessPoint C bap( bapn ): Blocking AccessPoint e C [(inp)] [(outp)] e CentralUnit CG CL lap( lapn ): Logging AccessPoint e C [(validity)][Code] [(inp)] [(outp)] Context parameters for dimensioning d d d L Logger [Code, (validity)] LL

SDS Foil no 29 Variability in system families (Product lines) Is inheritance sufficient? Additional composition will be needed in many cases! Is inheritance sufficient? Additional composition will be needed in many cases! Package system lib Process types Block types System types System Installation33: SystemType5 System Installation45

SDS Foil no 30 Summary 1 (Inheritance) Specialization of process, state types and procedures Simple inheritance, adding properties Virtual procedures Virtual transitions Specialization of block types Simple inheritance, adding properties Virtual block types Virtual process types Virtual procedure types Specialization of data and signal types Simple inheritance, adding properties Specialization of process, state types and procedures Simple inheritance, adding properties Virtual procedures Virtual transitions Specialization of block types Simple inheritance, adding properties Virtual block types Virtual process types Virtual procedure types Specialization of data and signal types Simple inheritance, adding properties

SDS Foil no 31 Summary 2 (Virtual, redefined, finalized) Virtual types may have virtuality constraints given by an atleast-clause which specifies a minimum type which the analysis of the enclosing type may take for granted. When no atleast-clause is given, the default is that the original virtual type itself is the constraint type. A redefined type is a type which is specified as virtual in a supertype of the type enclosing the redefined type. A redefined type must be a specialization of the virtuality constraint. A redefined type may be further redefined in specializations of its encloser. A finalized type is a type which is specified as virtual in a supertype of the encloser. A finalized type must be a specialization of the virtuality constraint. A finalized type may not be defined again in specializations of its encloser. Virtual, redefined and finalized can also be used for individual transitions in processes. The virtuality specification can occur in input symbols, start symbols and save symbols. Virtual types may have virtuality constraints given by an atleast-clause which specifies a minimum type which the analysis of the enclosing type may take for granted. When no atleast-clause is given, the default is that the original virtual type itself is the constraint type. A redefined type is a type which is specified as virtual in a supertype of the type enclosing the redefined type. A redefined type must be a specialization of the virtuality constraint. A redefined type may be further redefined in specializations of its encloser. A finalized type is a type which is specified as virtual in a supertype of the encloser. A finalized type must be a specialization of the virtuality constraint. A finalized type may not be defined again in specializations of its encloser. Virtual, redefined and finalized can also be used for individual transitions in processes. The virtuality specification can occur in input symbols, start symbols and save symbols.

SDS Foil no 32 Summary 3 (analyzability) Specifying a type as virtual decreases the degree of analysis which can be performed on its encloser (since the instances of the virtual type may be of a type which is actually not known at the analysis of the encloser). However, it increases the flexibility of specializations. Finalizing a type increases the degree of analysis which can be performed on the encloser. Specifying a type as virtual decreases the degree of analysis which can be performed on its encloser (since the instances of the virtual type may be of a type which is actually not known at the analysis of the encloser). However, it increases the flexibility of specializations. Finalizing a type increases the degree of analysis which can be performed on the encloser.