Interconnect Networks Basics. Generic parallel/distributed system architecture On-chip interconnects (manycore processor) Off-chip interconnects (clusters.

Slides:



Advertisements
Similar presentations
Comparison Of Network On Chip Topologies Ahmet Salih BÜYÜKKAYHAN Fall.
Advertisements

1 Message passing architectures and routing CEG 4131 Computer Architecture III Miodrag Bolic Material for these slides is taken from the book: W. Dally,
What's inside a router? We have yet to consider the switching function of a router - the actual transfer of datagrams from a router's incoming links to.
1 Lecture 23: Interconnection Networks Topics: communication latency, centralized and decentralized switches (Appendix E)
Department of Computer Engineering University of California at Santa Cruz Networking Systems (1) Hai Tao.
Wide Area Networks School of Business Eastern Illinois University © Abdou Illia, Spring 2007 (Week 11, Thursday 3/22/2007)
Communication operations Efficient Parallel Algorithms COMP308.
1 Lecture 24: Interconnection Networks Topics: communication latency, centralized and decentralized switches (Sections 8.1 – 8.5)
1 Lecture 25: Interconnection Networks Topics: communication latency, centralized and decentralized switches, routing, deadlocks (Appendix E) Review session,
Storage area network and System area network (SAN)
1 25\10\2010 Unit-V Connecting LANs Unit – 5 Connecting DevicesConnecting Devices Backbone NetworksBackbone Networks Virtual LANsVirtual LANs.
MULTICOMPUTER 1. MULTICOMPUTER, YANG DIPELAJARI Multiprocessors vs multicomputers Interconnection topologies Switching schemes Communication with messages.
Performance and Power Efficient On-Chip Communication Using Adaptive Virtual Point-to-Point Connections M. Modarressi, H. Sarbazi-Azad, and A. Tavakkol.
Connecting LANs, Backbone Networks, and Virtual LANs
Switching, routing, and flow control in interconnection networks.
Computer Networks Switching Professor Hui Zhang
Interconnect Network Topologies
Interconnection Networks. Applications of Interconnection Nets Interconnection networks are used everywhere! ◦ Supercomputers – connecting the processors.
Chapter 2 The Infrastructure. Copyright © 2003, Addison Wesley Understand the structure & elements As a business student, it is important that you understand.
Interconnect Networks
ICOM 6115©Manuel Rodriguez-Martinez ICOM 6115 – Computer Networks and the WWW Manuel Rodriguez-Martinez, Ph.D. Lecture 17.
On-Chip Networks and Testing
Introduction to Interconnection Networks. Introduction to Interconnection network Digital systems(DS) are pervasive in modern society. Digital computers.
Networks for Distributed Systems n network types n Connection-oriented and connectionless communication n switching technologies l circuit l packet.
Infiniband subnet management Discuss the Infiniband subnet management system Discuss fat tree and subnet management in an Infiniband with a fat tree topology.
1 Lecture 7: Interconnection Network Part I: Basic Definitions Part II: Message Passing Multicomputers.
High-Level Interconnect Architectures for FPGAs An investigation into network-based interconnect systems for existing and future FPGA architectures Nick.
Dynamic Interconnect Lecture 5. COEN Multistage Network--Omega Network Motivation: simulate crossbar network but with fewer links Components: –N.
Data and Computer Communications Chapter 10 – Circuit Switching and Packet Switching (Wide Area Networks)
Multiprocessor Interconnection Networks Todd C. Mowry CS 740 November 3, 2000 Topics Network design issues Network Topology.
1 Message passing architectures and routing CEG 4131 Computer Architecture III Miodrag Bolic Material for these slides is taken from the book: W. Dally,
William Stallings Data and Computer Communications 7 th Edition Chapter 1 Data Communications and Networks Overview.
Network-on-Chip Introduction Axel Jantsch / Ingo Sander
Anshul Kumar, CSE IITD CSL718 : Multiprocessors Interconnection Mechanisms Performance Models 20 th April, 2006.
Review: –Ethernet What is the MAC protocol in Ethernet? –CSMA/CD –Binary exponential backoff Is there any relationship between the minimum frame size and.
CS 8501 Networks-on-Chip (NoCs) Lukasz Szafaryn 15 FEB 10.
Chapter 8-2 : Multicomputers Multiprocessors vs multicomputers Multiprocessors vs multicomputers Interconnection topologies Interconnection topologies.
Anshul Kumar, CSE IITD ECE729 : Advanced Computer Architecture Lecture 27, 28: Interconnection Mechanisms In Multiprocessors 29 th, 31 st March, 2010.
Chapter 5 Network Architecture. Physical Topologies Bus Ring Star.
Networks: Routing, Deadlock, Flow Control, Switch Design, Case Studies Alvin R. Lebeck CPS 220.
Topology How the components are connected. Properties Diameter Nodal degree Bisection bandwidth A good topology: small diameter, small nodal degree, large.
1 Lecture 24: Interconnection Networks Topics: communication latency, centralized and decentralized switches, routing, deadlocks (Appendix F)
1 Switching and Forwarding Sections Connecting More Than Two Hosts Multi-access link: Ethernet, wireless –Single physical link, shared by multiple.
Computer Communication and Networking Lecture # 4 by Zainab Malik 1.
Effective bandwidth with link pipelining Pipeline the flight and transmission of packets over the links Overlap the sending overhead with the transport.
Cluster Computers. Introduction Cluster computing –Standard PCs or workstations connected by a fast network –Good price/performance ratio –Exploit existing.
Univ. of TehranIntroduction to Computer Network1 An Introduction to Computer Networks University of Tehran Dept. of EE and Computer Engineering By: Dr.
1 LAN switching and Bridges Relates to Lab Outline Interconnection devices Bridges/LAN switches vs. Routers Bridges Learning Bridges Transparent.
CHAPTER -II NETWORKING COMPONENTS CPIS 371 Computer Network 1 (Updated on 3/11/2013)
Univ. of TehranIntroduction to Computer Network1 An Introduction to Computer Networks University of Tehran Dept. of EE and Computer Engineering By: Dr.
Interconnection Networks Communications Among Processors.
Chapter 3 Part 3 Switching and Bridging
Interconnect Networks
Chapter 8 Switching Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display.
Dynamic connection system
Lecture 23: Interconnection Networks
Chapter 4 Data Link Layer Switching
Shuffle Exchange Point-to-point, Bus, Ring, Star, Mesh
Chapter 3 Part 3 Switching and Bridging
Introduction to Scalable Interconnection Network Design
Switching, routing, and flow control in interconnection networks
Communication operations
Introduction to Scalable Interconnection Networks
Storage area network and System area network (SAN)
Advanced Computer and Parallel Processing
Chapter 3 Part 3 Switching and Bridging
Advanced Computer and Parallel Processing
Switching, routing, and flow control in interconnection networks
Multiprocessors and Multi-computers
Presentation transcript:

Interconnect Networks Basics

Generic parallel/distributed system architecture On-chip interconnects (manycore processor) Off-chip interconnects (clusters of servers)

Interconnection network performance Latency: how much time does it take between the time when a send of 1 byte is issued and the time when the receive of the data is completed? – Signal propogation delay + router queuing delay Bandwidth: how much time to send a large amount of data (e.g. 1MB)? Examples: – Ethernet: Bandwidth 100Mbps, 1Gbps, 10Gbps, 100Gbps Latency: 25us -100us (user level, single hop, try ping between linprog’s) – InfiniBand Bandwidth: 20Gbps, 40Gbps, 54Gbps, 80Gbps, …… Latency: 1-3us (user level, single hop)

Interconnection network performance Latency and Bandwidth – Different levels User level: the performance that users feel Systems level, device level Which level will have the highest bandwidth? – Example: 1Gbps Ethernet, 800Mbps at system level, 650Mbps at the user level. 1Gbps Ethernet, which level? 0.115ms ping latency, which level? – Some measurement trap: single pair.vs. multiple pair.

Network components Network interface (card) Communication between a node and the network Link Bundle of wires and fibers that carry signals Switches Connects a fixed number of input channels to a fixed number of output channels. In this community, switches may also have the router functions.

Switch The cross-bar can realize a communication from any input port to any output port. The simplest form is a dedicated computer with memory (e.g. linux router).

Most expensive form: Cross-bar functionality – all permutations can be realized simultaneously inputinput output A 4x4 cross-bar Permutation: (1, 2, 3, 4) -> (3, 1, 2, 4) A communication pattern where each source happens once, each destination happens once. The input registers send control signals to the control, routing, scheduling module indicating the pattern; the control module computes and sets the dots (1,2, 3, 4)-> (3, 1, 2, 4) 1234 (1,2,3,4)->(4,3,2,2) Only (1,2,3,4)->(4,3,2,-)

Switch example: 24-port 1Gbps Ethernet switch 24 input ports and 24 output ports – each Ethernet jacket has one input port and one output port. All 24 machines can send and receive simultaneously. switch Ethernet card machine

Alternatives to cross-bars A question: why buffers when we can always do permutation? An N x N cross bar has O(N^2) cross points (on/off switches). – Not scalable, expensive An alternative for low end switches: bus and memory – When bus and memory is fast enough, moving data between input and output ports are like memory copy in a typical computer.

Bus and memory alternative to crossbar Realizing (1, 2, 3, 4) -> (4, 3, 2, 1) – Read from input port 1 to memory A – Read from input port 2 to memory B – Read from input port 3 to memory C – Read from input port 4 to memory D – Run forwarding logic (find out the output ports) – Write A to output port 4 – Write B to output port 3 – Write C to output port 2 – Write D to output port 1

Bus and memory alternative to crossbar A typical northbridge bandwidth is a few GBps. Let us assume the bandwidth is 4GBps, how many ports can the northbridge support in 100Mbps Ethernet swithes?

Another alternative: multistage interconnection network Realize all permutations without controlling O(N^2) cross-points. – Clos networks, Benes networks Each of the dot is a 2x2 switch, controlled by two states. 0 1 How to realize 0000->0000, 0001->0001, 0010->1011?

Switch All approximate crossbars – High end ones are equivalent to or close to crossbars: all permutations can happens simultaneously. – Low end ones will have limited total bandwidth (aggregate bandwidth). Example: High end and low end 24 port 1Gbps switch connecting 24 computers. – With one pair of Source/destination, the throughput will be about 800Mbps for both (no difference). – When 24 pairs send/receive at the same time High end one will get 24*800Mbps Low end one will get a total of X Mbps, X < 24*800Mbps (X can sometimes be about 5*800Mbps) – Different pairs may also have different throughput depending on the scheduling algorithm.

Network level components Topology (what) – Physical interconnection structure of the network graph. – Physically limits the performance of the networks. Routing algorithm (which) – Restricts the set of paths that messages can follow. Switching strategy (how) – How data in a message traverses a route (passing routers) Flow control mechanism (when) – When a message or portions of it traverse a route – What happens when traffic collides

Topology How the components are connected. Important properties Diameter: maximum distance between any two nodes in the network (hop count, or # of links). Nodal degree: how many links connect to each node. Bisection bandwidth: The smallest bandwidth between half of the nodes to another half of the nodes. A good topology: small diameter, small nodal degree, large bisection bandwidth.

Topology Regular topologies – Nodes are connected with some kind of patterns. The graph has a structure. – Nodes are identified by coordinates. – Routing can usually pre-determined by the coordinates of the nodes. Irregular topologies – Nodes are connected arbitrarily. The graph does not have a structure, e.g. internet More extensible in comparison to regular topology. – Usually use variations of shortest path routing.

Example regular topology: complete binary tree Nodal degree = ? Diameter = ? Bisection bandwidth = ?

Example regular topology: ring topology Nodal degree = ? Diameter = ? Bisection bandwidth = ? 01234

Routing: deciding which path to take from a source to a destination 0 to 1: 0->1 or 0->4->3->2->1 Which path to use? This is a routing issue. Routing objective: – Minimize resources used Shortest path routing – The load on all links are as balanced as possible (load balancing). ??? 01234

Classification of routing schemes 0 to 1: 0->1 or 0->4->3->2->1 Deterministic.vs. adaptive – Deterministic – always the same route – Adaptive – choose load depending on traffic condition? Minimal routing: always use shortest path Source routing: the source node supplies the path Destination routing: routing based on destination ID 01234

Switching Communication data units: – Message – Packet – Flit How a packet passes a switch. Circuit switching – circuit setup, all data pass through Packet switching: the whole packet stored in a switch, and then forwarded to the next hop

Flow-control Used between hops to make sure that when data is sent, there is available buffer for the data. Built into switching mechanism sometimes.