Recent cross-wiring issue and implication for circuits protection Bozhidar Panev TE-MPE-CP 14.04.2011.

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Presentation transcript:

Recent cross-wiring issue and implication for circuits protection Bozhidar Panev TE-MPE-CP

Short chronology of the event from FPA during pre-cycle on RB.A45 at 07:12: Energy was extracted without problems. Current in main circuit – 2349A The origin of the trip was found: –DQQDC board_A detected: U_HTS = 3mV and open the quench loop. U_RES in the same moment was ~20mV (threshold 100mV) The new feature recently introduced in main current lead protection units toggles detector boards (every 25s) allowing to record U_HTS and U_RES also for the redundant channel (board_B)

Short chronology of the event from Unusual behavior has been pointed out between board A and B in respect of U_HTS. Both two boards were checked through QPS Test Mode, simulating a voltage rise on the HTS and/or Resistive part Correct performance observed of board A and B Analysis of the event’s data and results from Test Mode bring the conclusion of abnormal behavior of U_HTS concerning board_B –Eventual short in the cable or inverted pins (Hypothesis of Reiner) –Giorgio also assured no errors found between PE and cold part of leads during ELQA campaign

U_HTS Signals for CL3 and CL4

What was wrong? Intervention in the Tunnel to check the cabling and discover what was wrong Cable patch - correct The Error was found in connector P60 of cable between QPS crate and Proximity cable patch. Pin 15(EE22) and 16(EE42) were inverted.

What was measured?

Verification for correct wiring of 13kA circuits (RB,RQD,RQF) Due to the available acquisition data from boards A and B. It became possible to check by TIMBER the rest RB, RQD/F circuits for swapped pins. The only what was necessary to be done was take a look and check how U_HTS and U_RES behave during the rump. U_HTS Board_A I_MEAS U_HTS Board_B

U_HTS Signals for CL3 and CL4 of DFLAS.7L5 Normal behavior of U_HTS of CL3 U_HTS stay flat during the rump - indication for problem

Verification for correct wiring of all IPDs, IPQs and ITs circuits – 08 th of April A dedicated PNO.a7 which does unbalanced powering was carried out over all IPQs. As no automatic swap between boards. The test has been done twice. Once at board_A and second at board_B. For IPDs and ITs a manual rump was done. Difficulties that were found: –When tried to switch to board_B, some B_board did not give power permit (13 circuits). It has required a local power-cycle. –The analysis of U_HTS signals

Criteria for correct wiring of IPQs, IPDs and ITs Resistive part of leads during asymmetric powering of RQ.8R1 HTS part of leads during asymmetric powering of RQ.8R1 Verification of U_RES and U_HTS for all IPDs, IPQS, ITs –Done for board A and B

Conclusion 8 th of April On Thu 7 th of April all 13kA circuits were checked for correct wiring. On Fri 8 th April all IPDs, IPQs, ITs also pased verification. 600A were not checked because its were checked by QPS team before with a correct procedure and dedicated tester – all tests are documented Green light for powering has been given

END