Design and Assessment of a Robust Voltage Amplifier with 2.5 GHz GBW and >100 kGy Total Dose Tolerance Jens Verbeeck TWEPP 2010.

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Presentation transcript:

Design and Assessment of a Robust Voltage Amplifier with 2.5 GHz GBW and >100 kGy Total Dose Tolerance Jens Verbeeck TWEPP 2010

Presentation: Jens Verbeeck 2 Outline  Introduction  Radiation and temperature effects  Constant g m amplifier  Matching structure  Conclusions

Outline  Introduction  Radiation and temperature effects  Constant g m amplifier  Matching structure  Conclusions Presentation: Jens Verbeeck 3

Introduction  Development of optical instrumentation and communication for nuclear and high temperature environments  Applicable for  MYRRHA  ITER  LHC  Space Presentation: Jens Verbeeck 4

Optical instrumentation Presentation: Jens Verbeeck 5 PD: Photo diode TIA: Transimpedance amplifier LA: Limiting amplifier AGC: Automatic gain controller TDC: Time to digital converter

Optical instrumentation Presentation: Jens Verbeeck 6  Goal  LIDAR with ps accuracy, distance =10m  Current status  TDC with ps resolution developed and irradiated up to 5MGy (Ying Cao)  November tape-out receiver channel

Presentation: Jens Verbeeck 7 Outline  Introduction  Radiation and temperature effects  Constant g m amplifier  Matching as a function of radiation dose  Conclusions

Radiation : Introduction TID Presentation: Jens Verbeeck 8 Oxide: Net positive charge trapped at the oxide Si-SiO 2 interface: vg > 0 => +∆vth (NMOS) vg -∆vth (PMOS) [Hugh J. Barnaby]

Temperature: effects Presentation: Jens Verbeeck 9 Decrease of mobility Increase of leakage current Decrease of V TH T Decrease of g m [P. C. de Jong et. al.] [M. Willander]

Outline  Introduction  Radiation and temperature effects  Constant g m amplifier  Matching as structure  Conclusions Presentation: Jens Verbeeck 10

Optical receiver  Classical building blocks  Transimpedance amplifier (TIA)  Post amplifier (PA)  Time to digital convertor (TDC) Presentation: Jens Verbeeck 11

Constant g m amplifier: Why? Presentation: Jens Verbeeck 12 Radiation/temperature causes variation in TIA parameters  g m and r out variable in formula A 0  Make gain independent of gm and r out

Constant g m amplifier: Why? Presentation: Jens Verbeeck 13 Radiation up to 300 kGy ( M. Manghisoni et al.) Temperature (-40 up to 130°C) 0.18µm CMOS 100kGy300kGy NMOS+7mV+20mV PMOS-12mV-60mV

Constant g m amplifier: Operation Presentation: Jens Verbeeck 14  R DSTOT >> RL  Transistor length ↑  Trade-off: BB temp/RAD tolerance [B.Razavi] [Sean Nicalson et al.]

Temperature simulations Presentation: Jens Verbeeck 15  Degradation with bias : 2.5 % Temperature sweep from 0 ° C to 100 ° C Gain =14dB GBW = 2.5Ghz BB = 500MHz

Radiation simulations Presentation: Jens Verbeeck 16  Degradation with bias : 0.85 % Amplifier irradiated up to 300kGy

Results Presentation: Jens Verbeeck 17 Temperature drift 5.6 % or 343 ppm/°C Radiation up to 100 kGy Gain degradation 4.5%

Results: Radiation Presentation: Jens Verbeeck 18 Cause degradation?  V THsens = Standard deviation before radiation of M1 and M2  ∆ V THsens = Variation of V THsens Impact of a ∆V THsens of 10% on the gain of the amplifier. Large V GS –V TH for high radiation tolerance g m = 2*I DS /(V GS -V TH ) => I DS ↑↑ & V DSsat ↑↑

Layout Presentation: Jens Verbeeck 19

Outline  Introduction  Radiation and temperature effects  Constant g m amplifier  Matching structure  Conclusions Presentation: Jens Verbeeck 20

Matching Presentation: Jens Verbeeck 21  Standard deviation between identical components fabricated on the same chip =>small statistic variations = MISMATCH  Good matching  good PSRR, CMRR  Important for replica biasing  Reduces offset  Matching of V th depends strongly on area transistor

Matching Presentation: Jens Verbeeck 22  Layout transistors on chip  Drains connected in each column  Gates connected in each row  Shared source and bulk  6 regular transistors, 6 Enclosed layout transistors [G. Annelie et al.]

Radiation effects up to RD of 100kGy Presentation: Jens Verbeeck 23  Decrease of V TH  Rebound effect  RINCE effect [F. Faccio]  Different effect for large gates  Radiation Induced Narrow Channel Effect  Standard deviation V TH –shift! =>  No significant effects Regular NMOS transistors ELT transistors

Outline  Introduction  Radiation and temperature effects  Constant g m amplifier  Transistor measurements  Conclusions Presentation: Jens Verbeeck 24

Conclusions  Effects of radiation and temperature  Change of transistor parameters  Varying gain  Gain can be held stable with constant g m amplifier  BW and GBW of optical receiver guaranteed  Open loop control  Generate bias voltages for whole chip with g m biasing  Trade off: bandwidth  temperature tolerance  Trade off: current consumption & voltage headroom  rad. Tolerance  Larger V GS -V TH => V DSsat ↑↑  difficult to keep transistors in saturation at high temperatures.  Matching results  Decrease of V TH  V TH -shift depending on transistor width  Standard deviation V TH –shift Presentation: Jens Verbeeck 25

Questions Presentation: Jens Verbeeck 26 ? Acknowledgments to:

References Presentation: Jens Verbeeck M. Manghisoni, L. Ratti, V. Re and V. Speziali, “ Radiation hardness perspectives for the design of analog detector readout circuits in the µ m CMOS Generation ”, Transactions on nuclear science, VOL. 49 NO. 6, December Hugh J. Barnaby, “ Total-Dose Effects in Modern Integrated Circuit Technologies” IEEE NSREC, F. Faccio, G. Cervelli, “ Radiation-Induced Edge effects in Deep Submicron CMOS transistors ”, Transactions on nuclear science, VOL. 52 NO. 6, December M. Willander and H. L. Hartnagel (eds.), High Temperature Electronics, Chapman & Hall, London, P. C. de Jong, G. C. M. Meijer, and A. H. M. van Roermund, “ A 300 °C dynamic feedback instrumentation amplifier, ” IEEE J. Solid-State Circuits, vol. 33, no.12, pp , Dec Sean Nicalson and Khoman Phang, “Improvements in biasing and compensation of cmos opamps”, ISCAS B. Razavi, “Design of analog integrated circuits” 8. G. Anelli et al.,“ Radiation tolerant VLSI circuits in standard deep submicron CMOS technologies for the LHC experiments: Practical design aspects,” IEEE Trans. Nucl. Sci., vol. 46, no. 6, pp. 1690–1696, Dec.1999.