ENEE244-02xx Digital Logic Design Lecture 5. Announcements Homework 1 solutions are on Canvas Homework 2 due on Thursday Coming up: First midterm on Sept.

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Presentation transcript:

ENEE244-02xx Digital Logic Design Lecture 5

Announcements Homework 1 solutions are on Canvas Homework 2 due on Thursday Coming up: First midterm on Sept. 30

Agenda Last time: – Boolean Algebra axioms and theorems (3.1,3.2) – Canonical Forms (3.5) This time: – Finish up Canonical Forms (3.5) – Manipulations of Boolean Formulas (3.6) – Gates and Combinational Networks (3.7) – Incomplete Boolean Functions and Don’t Care Conditions (3.8 )

Canonical Forms (Review) XYZf

Canonical Forms Conversion

Manipulations of Boolean Formulas

Equation Complementation

Expansion about a Variable

Shannon’s Reduction Theorems

Example of Equation Simplification

Gates and Combinational Networks

Digital Logic Gates

Gates and Combinational Networks Synthesis Procedure Example: Truth table for parity function on three variables XYZf

Synthesis Procedure XYZf

Two-level Gate Network

Incomplete Boolean Functions and Don’t Care Conditions

Describing Incomplete Boolean Functions XYZF

Describing Incomplete Boolean Functions XYZF

Describing Incomplete Boolean Functions Manipulating Boolean equations derived from incomplete Boolean functions is a very difficult task. In the next chapter, there are procedures for obtaining minimal expressions that can handle the don’t care conditions. Can leverage don’t care conditions to get simplified expressions for functions (smaller gate networks).