LAB FINAL PROBLEMS 4.2 & 4.3 SHANNON MATUSZNY. LAB FINAL Objective : Verify that reducing Boolean expressions is reliable in creating the same results.

Slides:

Advertisements

Similar presentations

Advertisements

Chapter 3 Logic Gates and Boolean Algebra – Part 1

Programming Logic Gate Functions in PLCs

CSIS 3510 Computer Organization and Architecture Topics covered in this lecture: –Review of De’Morgan’s Theorem –Using De’Morgan’s Theorem –Building a.

1 Combinational Logic Design&Analysis. 2 Introduction We have learned all the prerequisite material: – Truth tables and Boolean expressions describe functions.

ECE 2373 Modern Digital System Design Exam 2. ECE 2372 Exam 2 Thursday March 5 You may use two 8 ½” x 11” pages of information, front and back, write.

Digital Electronics Dan Simon Cleveland State University ESC 120 Revised December 30, 2010.

1 Homework Reading –Tokheim, Section 5-1, 5-2, 5-3, 5-7, 5-8 Machine Projects –Continue on MP4 Labs –Continue labs with your assigned section.

08/07/041 CSE-221 Digital Logic Design (DLD) Lecture-8:

Chapter 4 Logic Gates and Boolean Algebra. Introduction Logic gates are the actual physical implementations of the logical operators. These gates form.

Combinational Logic Circuits Reference: M. Mano, C. Kime, “Logic and Computer Design Fundamentals”, Chapter 2 Dr. Costas Kyriacou and Dr. Konstantinos.

Combinational Logic Design

In this module you will learn: What the various logic gates do. How to represent logic gates on a circuit diagram. The truth tables for the logic gates.

Combinational Logic Design CS341 Digital Logic and Computer Organization F2003.

LOGIC GATES Logic generally has only 2 states, ON or OFF, represented by 1 or 0. Logic gates react to inputs in certain ways. Symbol for AND gate INPUT.

Logic gates & Boolean Algebra. Introduction Certain components (called logic elements) of the computer combine electric pulses using a set of rules. Electric.

DeMorgan Theorem, Computer Simulation Exercises

Digital Electronics Lecture 4 Simplification using Boolean Algebra, Combinational Logic Circuit Design.

Apr. 3, 2000Systems Architecture I1 Systems Architecture I (CS ) Lecture 3: Review of Digital Circuits and Logic Design Jeremy R. Johnson Mon. Apr.

Why? What’s Boolean algebra used for? –“The purpose of Boolean algebra is to facilitate the analysis and design of digital circuits.” Express a truth table.

ACOE1611 Combinational Logic Circuits Reference: M. Mano, C. Kime, “Logic and Computer Design Fundamentals”, Chapter 2.

CH51 Chapter 5 Combinational Logic By Taweesak Reungpeerakul.

Using De’Morgan’s On of the most useful principles in boolean algebra is De’Morgan’s Theorem, which allows one to switch between ANDs and NORs and ORs.

ENEE244-02xx Digital Logic Design Lecture 5. Announcements Homework 1 solutions are on Canvas Homework 2 due on Thursday Coming up: First midterm on Sept.

Chapter 4 Fundamentals of Computer Logic 1 Chapter 4: Fundamental of Computer Logic - IE337.

1 Homework Reading –Tokheim, Section 5-1, 5-2, 5-3, 5-7, 5-8 Machine Projects –Continue on MP4 Labs –Continue labs with your assigned section.

1 CS 151: Digital Design Chapter 3: Combinational Logic Design 3-1Design Procedure CS 151: Digital Design.

CS151 Introduction to Digital Design Chapter 3: Combinational Logic Design 3-1 Design Procedure 1Created by: Ms.Amany AlSaleh.

Circuits & Boolean Expressions. A ABC BC ABC C B A Example # 1: Boolean Expression: Develop a Boolean expression from a circuit.

Combinational Logic Design. 2 Combinational Circuits A combinational logic circuit has: ♦ A set of m Boolean inputs, ♦ A set of n Boolean outputs ♦ n.

CHAPTER 5 Combinational Logic Analysis

Unit II Fundamentals of Logic Design By Roth and Kinney.

Chapter 5 Boolean Algebra and Reduction Techniques 1.

Logic Gates and Boolean Algebra Introduction to Logic II.

Combinational Logic Design. 2 Combinational Circuits A combinational logic circuit has: ♦ A set of m Boolean inputs, ♦ A set of n Boolean outputs ♦ n.

Circuit Synthesis A logic function can be represented in several different forms:  Truth table representation  Boolean equation  Circuit schematic 

Lecture 1 Gunjeet kaur Dronacharya group of institutions.

Basic Gates and ICs 74LS00 Quad 2-Input NAND gate 74LS02 Quad 2-Input NOR gate 74LS04 Quad 2-Input NOT gate 74LS08 Quad 2-Input AND gate 74LS32 Quad 2-Input.

Homework Reading Machine Projects Labs

Eng. Mai Z. Alyazji October, 2016

Logic Gates and Boolean Algebra

Combinational Logic Circuits

Logic Gates, Boolean Algebra and Karnaugh Maps

Lab02 :Logic Gate Fundamentals:

Logic Gates Benchmark Companies Inc PO Box Aurora CO

EI205 Lecture 5 Dianguang Ma Fall 2008.

NAND Gate Truth table To implement the design,

Jeremy R. Johnson Wed. Sept. 29, 1999

Computer Science 210 Computer Organization

Recapping: Writing with algebra

Elec 2607 Digital Switching Circuits

Combinational Logic Design Process

Universal gates.

Waveforms & Timing Diagrams

Chapter 3 – Combinational Logic Design

Design Example “Date of Birth Problem”

Gates Type AND denoted by X.Y OR denoted by X + Y NOR denoted by X + Y

GCSE Computer Science – Logic Gates & Boolean Expressions

Today You are Learning simple logic diagrams using the operations AND, OR and NOT truth tables combining Boolean operators using AND, OR and NOT.

Digital Logic Experiment

Truth tables Mrs. Palmer.

Department of Electronics

Digital Logic Design Basics Combinational Circuits Sequential Circuits.

Boolean Algebra and Gate Networks

Eng. Ahmed M Bader El-Din October, 2018

Agenda Lecture Content: Combinatorial Circuits Boolean Algebras

Presentation transcript:

LAB FINAL PROBLEMS 4.2 & 4.3 SHANNON MATUSZNY

LAB FINAL Objective : Verify that reducing Boolean expressions is reliable in creating the same results as the original expression Text Reference: Chapter 4, Problems 2 & 3 Items Used: 74LS04 – NOT GATE 74LS10N – 3 INPUT NAND GATE 7432N – OR GATE 74LS08 – AND GATE 74LS27 – 3 INPUT NOR GATE 3 TOGGLE SWITCHES 2 LED MONITORS 0-5 VOLT POWER SOURCE MULTISIM

4.2 PROCEDURE a) Make the Boolean formula from the following diagram X =[(MNQ)’(MN’Q)’(M’NQ)’]’ X

4.2 PROCEDURE b)Mathematically simplify the equation from a) and draw out the diagram of the simplified equation. X = [(MNQ)’(MN’Q)’(M’NQ)’]’ X = MNQ + MN’Q + M’NQDEMORGANS X = MQ(N + N’) + M’NQ13A X = MQ(1) + M’NQ8 X = MQ + M’NQ2 X = Q(M + M’N)13A X = Q(M + N)15A M N Q Y

4.2 PROCEDURE c) Draw the truth table for the expression derived from a). MNQ(MNQ)’(MN’Q)’(M’NQ’)XX’XY Test Results

4.2 PROCEDURE d) Build and test both the original circuit and the simplified circuit. Enter your results in the truth table in c) under Test Results. Verify that the test results, from both the original and simplified circuit, match the expected results in a) and b). e) Build the circuit in Multisim and test the results using a Logic Analyzer.

4.3 PROCEDURE f) Change all of the NAND gates to NOR gates in the diagram in a). Draw the new diagram and derive a formula based off of the new diagram. Write the Boolean equation for the following circuit X = [(M + N + Q)’ + (M + N’ + Q)’ + (M’ + N + Q)’]’ X

4.3 PROCEDURE g) Repeat b) through d) using the expression in e) in place of the expression in a) Simplified equation using Boolean Algebra and diagram X = [(M + N + Q)’ + (M + N’ + Q)’ + (M’ + N + Q)’]’ X = MNQ + MN’Q + M’NQDEMORGANS X = NQ(M + M’) + MN’Q13A X = NQ(1) + MN’Q8 X = NQ + MN’Q2 X = Q(N + MN’)13A X = Q(N + M)15A M Q N Y

4.3 PROCEDURE Truth Table MNQ(M+N+Q)’(M+N’+Q)’(M’+N+Q’)XX’XY Test Results

4.3 PROCEDURE Build and test both the original and simplified circuit. Verify the results. Build and simulate the original and simplified circuit in Multisim. Verify the results.

Analysis Using Boolean Algebra in order to simplify circuits has many benefits in both simulation and actual operation. Processing time and cost efficiency are the main benefactors in simplifying circuits. By completing this lab, it was proved that reducing Boolean expressions is reliable in creating the same results as the original expresssion.