Directional and Single-Driver Wires in FPGA Interconnect Guy Lemieux Edmund LeeMarvin TomAnthony Yu Dept. of ECE, University of British Columbia Vancouver,

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Presentation transcript:

Directional and Single-Driver Wires in FPGA Interconnect Guy Lemieux Edmund LeeMarvin TomAnthony Yu Dept. of ECE, University of British Columbia Vancouver, BC, Canada

Outline Motivation Bidirection vs. Directional –New detailed routing architecture –Which is better? Tristate vs. Single-Driver –HSPICE results –Which is better? Place & Route Results Conclusions

Motivation: Bidirectional Wires Logic Interconnect

Motivation: Bidirectional Wires Problem Half of Tristate Buffers Left Unused Buffers Dominate Size of Device

Bidirectional vs. Directional Wiring

Bidirectional vs Directional

2-Dimensional FPGA aka Island-Style or Mesh

Bidirectional Switch Block

Directional Switch Block

Bidirectional vs Directional Switch Element: Same Quantity and Type of Circuit Elements (twice the wiring) Switch Block: Directional has Half as Many Switch Elements

Building up Long Wires Start with One Switch Element Wire ends for straight connections.

Building up Long Wires Connect MUX Inputs Extend MUX inputs

Building up Long Wires Connect MUX Inputs TURN UP from wire-ends to mux

Building up Long Wires Connect MUX Inputs TURN DOWN from wire-ends to mux

Building up Long Wires Add +2 More Wires (4 total) Add LONG WIRES, turning UP and DOWN.

Building up Long Wires Add +2 More Wires (6 total) Add LONG WIRES, turning UP and DOWN

Building up Long Wires Single Layout Tile !!! Add wire twisting

Long Wires! 123 NOTICE: One switch element holds 6 wires #Wires := WireLength x NumDirections = 3 x 2 = 6 No “partial” switch elements with fewer wires

Small Switch Block One L3 Switch Element

Bigger Switch Block Two L3 Switch Elements NOTICE Switch element design forces quantization of channel width Bidirectional One quantum = 1*L Directional One quantum = 2*L

Summary Directional wiring –Good Potential area savings –Bad Big input muxes, slower Bigger quantum size (2*L) Detailed-routing architecture is different (need new switch block) –Need to evaluate!

Tristate vs. Single-driver Wiring

Bidirectional Wiring Outputs are Tristates Multi-driver Wiring!!! Bidir Architecture Fanout increases delay

Directional Wiring Outputs can be Tristates Dir-Tri Architecture Multi-driver Wiring!!! Fanout increases delay

Directional Wiring Outputs can use switch block muxes Dir Architecture Single-driver Wiring!!! New connectivity constraint

Tristate HSPICE Model

Single-driver HSPICE Model

HSPICE Delays Includes Switch + Wire TSMC 0.18um

AREA * HSPICE Delay TSMC 0.18um

Summary Single-driver wiring –Good Same delay as tristate No delay increases caused by fanout Fewer wire loads: 27% lower capacitance –Bad Directional only (by necessity) Area-delay product “seems” worse, but isn’t

Place and Route Results

Channel Width

Area (Transistor Count)

Delay

Area-Delay Product

Results Summary Average improvements using single-driver wiring 0% channel width 9% delay 14% tile length of physical layout 25% transistor count 32% area-delay product 37% wiring capacitance

Conclusions No more tristates! –Eliminates need for pass transistors –No “Vt” loss signal degradation –Better signal reliability, better drive strength Significant savings in all metrics –Any reasons left to use bidirectional wiring ??? Savings INCREASES with circuit size –Because interconnect dominates big circuits