Alberto AnnoviFTK meeting - September 30, 2004 Ideas for a Fast-Track trigger processor - FTK... an evolution of the CDF Silicon Vertex Trigger (SVT) A.

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Presentation transcript:

Alberto AnnoviFTK meeting - September 30, 2004 Ideas for a Fast-Track trigger processor - FTK... an evolution of the CDF Silicon Vertex Trigger (SVT) A. Annovi for the Fast-Track group Work during : INFN, University of Pisa, SNS - Pisa University of Chicago University of Geneva Co-operating on standard cell AMChip: INFN, University of Ferrara FAST-TRACK COLLABORATION Offline-quality Level 1 output rate

Alberto AnnoviFTK meeting - September 30, 2004  Fast-Track working principles  FTK performances overview speed & size track quality  FTK can grow with the experiment Proposed plan  Possible applications and physics reach: b-tagging e/  selection More details on Trans. on Nucl. Sci. papers: Outline

Alberto AnnoviFTK meeting - September 30, 2004  30 minimum bias events + H->ZZ->4  Tracks with P t >2 GeV Where is the Higgs?   FTK     30 minimum bias events + H->ZZ->4   Tracks with P t >2 GeV Where is the Higgs? Help! Online tracking: a tough problem

Alberto AnnoviFTK meeting - September 30, 2004 Where could we insert FTK? Fast Track + few (Road Finder) CPUs Fast Track + few (Road Finder) CPUs Track data ROB Track data ROB high-quality tracks: Pt>1 GeV Ev/sec = 50~100 kHz Very low impact on DAQ PIPELINE LVL1 Fast network connection CPU FARM (LVL2 Algorithms) CALO MUON TRACKER Buffer Memory ROD Buffer Memory FE Raw data ROBs 2 nd output 1 st output No change to LVL2

Alberto AnnoviFTK meeting - September 30, 2004 Tracking in 2 steps 1.Find low resolution track candidates called “roads”. Solve most of the combinatorial problem. 2.Then track fitting inside roads. Thanks to 1 st step it is much easier.

Alberto AnnoviFTK meeting - September 30, st step: pattern recognition with the Associative Memory (AM) Dedicated device with maximum parallelism Store all patterns corresponding to interesting tracks Road search happens during detector readout How to send all hits to the AM? SVT’s AMChip

Alberto AnnoviFTK meeting - September 30, 2004 Pixels barrelSCT barrelPixels disks 1/2  AM Divide into  sectors 6 buses 40MHz/bus ATLAS Pixels + SCT Feeding 50KHz event rate 6 Logical Layers: full  coverage Allow a small overlap for full efficiency Simple configuration for the beginning

Alberto AnnoviFTK meeting - September 30, 2004 AM input bandwidth = 40 MHz cluster/bus AM input buses = 6 Logical layer cluster rate Pix MHz Pix 2 + extra MHz SC0 + extra MHz SC1 + extra MHz SC2 + extra MHz SC3 + extra MHz Ev/sec 50kHz 2 FTK processors working in parallel for the whole Pix+Si tracker More processors as a backup option ATLAS-TDR-11

Alberto AnnoviFTK meeting - September 30, 2004 Track data ROB Track data ROB Raw data ROBs ~Offline quality Track parameters ~75 9U VME boards – 4 types SUPER BINS DATA ORGANIZER ROADS ROADS + HITS EVENT # N PIPELINED AM HITS DO-board EVENT # 1 AM-board 2 nd step: track fitting Inside Fast-Track Pixels & SCT Data Formatter (DF) 50~100 KHz event rate RODs cluster finding split by logical layer overlap regions GB Few CPUs S-links CORE

Alberto AnnoviFTK meeting - September 30, 2004 proposed R&D program 2 nd output 1 st output Soon: in order to have the FTK in the future the only short term issue is the availability of the dual output HOLA. (also useful for diagnostic and commissioning) Alternative: use optical splitters very low luminosity minimal R&D FTK system very cheap using low density CDF AMChip (barrel only: ~40 boards) 2009 ?: increase the R&D system to include disks new AMChip for 2*10 33 lumi (barrel+disks: ~75 boards) 2011 ?: upgrade for high lum.

Alberto AnnoviFTK meeting - September 30, 2004 How FTK core will look like? AM-B7AM-B8 AM-B1 AM-B0 DO5 DO4 DO3DO2 DO1 DO0 CUSTOM BACKPLANE Ghost Buster FTK INPUT CPU0 CPU1 O( ) patterns AM-B2AM-B3 CPU2 CPU3 AM-B4AM-B5 AM-B6 ~ offline quality tracking 50 kHz event (2*10 33 lumi) 2 core crates + 3DF crates 128 AMChips /board

Alberto AnnoviFTK meeting - September 30, 2004 ATLAS Barrel (~CERN/LHCC97-16) 7 layers: 3 Pixel + 4  strip (no stereo) Cylindrical Luminosity Region: R=1mm,  z=±15cm Generate tracks (Pt>1 GeV) & store NEW patterns 15M patterns Thin Road Width (r  z): pixel 1mm6.5cm Si 3mm12.5cm Medium Road Width: pixel 2mm6.5cm Si 5mm12.5cm Large Road Width: pixel 5mm6.4cm Si 10mm12.5cm The Associative Memory can store any kind of tracks: Conversions, delta-rays, k s decays … Including them just requires a lager Associative Memory These kind of tracks have not been studied. BUT we can do the exercise again.

Alberto AnnoviFTK meeting - September 30, 2004 Fit/trk   x  13 comb x 34 roads= 440 comb/track QCD Pt> fit x 4 roads = 6 comb/track QCD Pt fit x 6 roads = 14 comb/track QCD Pt fit x 9.5 roads = 74 comb/track QCD Pt fit x 25 roads = 658 comb/track QCD Pt200 thin large Track fitting workload Low luminosity: 2*10 33

Alberto AnnoviFTK meeting - September 30, 2004 Step 2: Software Linear Fit Nfit/trk Ntrk/ev L1 Trig jet soft jet soft  L1 Rate <100Hz <3KHz ~5KHz ~40KHz Pt 200 Pt 100 Pt 40 Pt 10 Fits/sec <1.1MHz <3MHz 750KHz 3MHz 8MHz Pulsar TF fit/s 10 MHz PIII 800MHz fit/s 1.1 MHz Htt 130 comb/trk 34 trk/ev = 1ms max latency = 100ms only 8 CPUs (barrel) Latency Test Pulsar TF + new mez. fit/s >30 MHz

Alberto AnnoviFTK meeting - September 30, 2004 Is 2 nd step  as good as offline?   /N ATLAS Genova: M. Cervetto, P. Morettini, F. Parodi, C. Schiavi, presented on 20-Nov-2002 at PESA Track finding within a road is fast Fitting in linear approximation Testing the linear fit with a fast simulation of ATLAS Silicon Tracker Track parameter residuals:  (d 0 ) = 17  m

Alberto AnnoviFTK meeting - September 30, 2004 FTK R&D status 3 DF crates: cluster finding split by layer 2 “core” crates: road finding track fitting S-links Raw data ROBs Track data ROB Track data ROB AMChip AMBoard Data Organizer Ghost Buster Track Fitter Data Formatter board Pixel cluster finder TODO: Pixels & SCT RODs

Alberto AnnoviFTK meeting - September 30, 2004 TODO list DF boardhave some ideas Pixel cluster finderneed R&D work AMChipnew design for 2*10 33 lumi AMBoardmodify prototype Data Organizermodify prototype / new R&D Ghost BusterPulsar ?? Track FitterCPU or FPGA ??? FTK simulationneeded for design studies

Alberto AnnoviFTK meeting - September 30, 2004 FTK R&D status FTK AMBoard Modifing it for CDF SVT upgrade Will learn from CDF experience then modify it for ATLAS FTK Data Organizer 1 st prototype never fully tested Need a lot of RAM on board Buffers up to 16 events more complex than SVT HB

Alberto AnnoviFTK meeting - September 30, 2004 How to use Fast-Track to capture as much PHYSICS as possible b e b b   FTK e   hb b  Hard life for all LVL2 objects!

Alberto AnnoviFTK meeting - September 30, 2004 ATL-DAQ Offline-quality b-tagging for events rich in b-quarks with Fast-Track offline b-tag performances early in LVL2 ATLAS TDR bb RuRu Calibration sample bbH/A bbbb tt qqqq-bb ttH qqqq-bbbb H/A tt qqqq-bb H hh bbbb H +- tb qqbb Z0 bb

Alberto AnnoviFTK meeting - September 30, 2004 ATLAS + FTK 4SE200 + J70 + J50 + J15 (|  |<2.5) ““ ““ 2.6MU6 + J25 + J10 (|  |<2.5) 50 mini ev. 2 b-jets + M bb > mini ev. 2 b-tags + M bb > 50 13b leading 43 b-tags ATL-COM-DAQ F. Gianotti, LHCC, 01/07/2002 & CMS TDR 6 Triggers w/o and with FTK Scenario: L= 2 x deferral ATLAS CMS 5b-jet 237Inclusive b-jet 0.2 J200 3J90 4J65 40  20 2  MU20 2MU6 HLT rate (Hz) HLT selection LVL1 rate (kHz) LVL1 selection 25 j400 3j165 4j110

Alberto AnnoviFTK meeting - September 30, 2004 bbH/A  bbbb ATLAS-TDR-15 (1999) M A (GeV) tan  200 Analysis: 4 b-jets |  j |<2.5 P T j > 70, 50, 30, 30 GeV efficiency 10% Effect of trigger thresholds (before deferrals) ATLAS + FTK triggers 13%3b leading3J + SE200 8%3 b-tagsMU6  + 2J Effic.LVL2LVL1 As efficient as offline selection: full Higgs sensitivity ATL-COM-DAQ

Alberto AnnoviFTK meeting - September 30, 2004 Electron Identification Swapping trigger algorithms can reduce trigger rate while increasing efficiency! CERN/LHCC/ L2 tracking EF tracking ATLAS With FTK tracks are ready on the shelf: using tracks could be even faster than using calorimeter raw data! Efficiency & jet rejection could be enhanced by using tracks before calorimeters.

Alberto AnnoviFTK meeting - September 30, 2004 L=2x10 33 cm -2 sec - 1 HLT  CMS H(200,500 GeV)   1,3h ± + X  (QCD GeV)  (H(200,500 GeV)   1,3h+X) m H =500 m H =200 TRK tau on first calo jets Pix tau on first calo jet Staged-Pix tau on first calo jet TRK tau on both calo jets Calo tau on first jet Efficiency & jet rejection could be enhanced by using tracks before calorimeters.

Alberto AnnoviFTK meeting - September 30, 2004  FTK can find offline quality output rate!  FTK is very compact: 2 “core” crates + 3 DF’s crates (for a first barrel only R&D system)  More efficient LVL2 triggers: Lower LVL1 & LVL2 thresholds and save CPU power!  b-jet,  -jet tagging at rates KHz: more Higgs physics ! Conclusion

Alberto AnnoviFTK meeting - September 30, 2004 M bb (GeV) Events Z0  b-bbar Important b-jet calibration tool CDF RunII pseudo exp. (with SVT) Cdf/anal/top/cdfr/4158 ATL-COM-DAQ ATLAS + FTK 20fb -1  20M bb > 503J + SE200  60M bb > 50MU6  + 2J S/  B LVL2LVL1 (S/  B = 35) 2fb -1 M bb (GeV) Events

Alberto AnnoviFTK meeting - September 30, 2004 Standalone program to produce hits from tracks; it includes: multiple scattering ionization energy losses detector inefficiencies resolution smearing primary vertex smearing:  xy =1mm  z =6cm Detector hits generated from: (Pythia) QCD10 sample: QCD Pt>10 GeV L1  QCD40 sample: QCD Pt>40 GeV L1 soft jet QCD100 sample: QCD Pt>100 GeV L1 jet QCD200 sample: QCD Pt>200 GeV L1 jet all samples + noise +. Road finding 6 layers/7 (FTK simulation)

Alberto AnnoviFTK meeting - September 30, 2004 Data Organizer Hits Tracks parameters (d, p T, ,  z) Roads Associative Memory Hits Pattern recognition with Associative Memory (AM) using up to 12 layers no need for initial seed highly parallel algorithm using coarser resolution to reduce memory size Roads + hits Track Fitter Track fitting using full resolution of the detector Use CPUs for maximum flexibility FTK Basic Architecture

Alberto AnnoviFTK meeting - September 30, 2004 Step 1: Pattern Recognition Hardware + CPU: 4 AM (40M patterns) 8 CPUs Ev/sec 50KHz AM Simulation: 10 7 CPUs Ev/sec 50 KHz Software future: better algorithms (region of interest) Barrel