Counters 2.1 MSI Counters Counter ICs ©Paul Godin Updated Aug 2013 gmail.com.

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Counters 2.1 MSI Counters Counter ICs ©Paul Godin Updated Aug 2013 gmail.com

Counters 2.2 Introduction SSI: Small Scale Integration. Usually refers to IC’s that contain individual gates or flip-flops. MSI: Medium Scale Integration. Usually refers to IC’s that contain counters, encoders, etc… LSI and VLSI: Large and Very Large Scale Integration. Refers to IC’s that can perform large logic functions, such as CPLDs, microprocessors, etc. ASIC: Application Specific IC. Refers to IC’s that are custom built for specific functions, and are vendor- specific. An example is the chip in a TI Calculator.

Counters 2.3 Counter ICs There are many counter ICs available, each with a specific set of functions. Examples of functions include: Loading a value (instead of resetting to 0) Counting up or down by either: Up/Down selection input Dual clock inputs (one for up, one for down) Frequency division: Specific input frequencies (i.e. ÷ 60 or by a crystal frequency) Output patterns Multiple counters within a single package Decade or binary counting Borrow and Carry,...

Counters 2.4 The 7490 The 7490 is a decade counter (Modulus = 10) List the features for the 7490:

Counters Frequency Division The 7490 has two modes of operation: Mod-10 up count Symmetrical divide-by-ten Bi-Quinary frequency division

Counters 2.6 The The is a decade counter (Modulus = 10) List the features for the 74192:

Counters 2.7 The The has several features. Note the specification sheet does not include a function table, but uses a sample timing diagram to explain the functions of the device.

Counters 2.8 The The (or 4518) is a decade counter (Mod = 10) List the features for the 14518:

Counters 2.9 The The is a popular counter IC because it includes two decade counters within a monolithic package. Note that this device is electrically different from the 74xxx series of devices. This device can be configured to accept either a positive edge or a negative edge.

Counters 2.10 Cascading Counters Cascading means connecting one device to another device for it to continue the logic operation. When designing a digital clock, counters need to be cascaded. Consideration must be given to how the next counter in the cascade will be incremented. The MSB that changes will produce a negative edge when the count returns to zero.

Counters 2.11 MSB Edge Decade DCBA A B C D LSB MSB Negative edge produced by 9-to-0 transition on D

Frequency Division Counters are often used as frequency dividers. Example: A common frequency for crystal oscillators is KHz. We can divide this frequency into a 1 Hz pulse by using full-sequence counters: Counters 2.12 ÷16 ÷ Hz 2048Hz 128Hz 8Hz 1Hz How many flip-flops if we built this as a single counter?

Counters 2.13 MSB Edge Cascading Decade DCBA Mod-6 DCBA Negative edge produced by 5-to-0 transition on C D does not change so it isn’t used for cascade Decade LSB MSB

Counters 2.14 In-Class Exercise Use EWB to design a 12 hour clock with AM and PM settings. Include seconds, minutes and hours. Use the appropriate counter IC for this exercise. Use EWB Sub-Circuits. Special consideration to the hours: The clock counts from 12 to 1 Consider what state must be detected and what must happen.

Counters 2.15 End ©Paul R. Godin gmail.com