Microprocessor Fundamentals Week 3 Mount Druitt College of TAFE Dept. Electrical Engineering 2008.

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Microprocessor Fundamentals Week 3 Mount Druitt College of TAFE Dept. Electrical Engineering 2008

© Mike Stacey 2007 Practical Exercises [1] You should have the following files saved to your floppy or flash disk:  EXAMPLE.COM  DEX1.COM  DEX2.COM  DEX3.COM  DEX3.TXT

© Mike Stacey 2007 Practical Exercises [2] These files should be saved to your floppy or flash disk as follows:

© Mike Stacey 2007 Review Questions 1.How many address lines does the 8086 microprocessor have? 2.How many physical locations can the 8086 microprocessor access directly? 3.At any time the 8086 works with four segments: 1.Name the four segment registers. 2.How many bits does each segment register contain? 3.What is the maximum number of bytes that each segment may contain? 4.What is the function of the 8086 queue? 5.How does the queue speed up the operation of the processor? 6.If the code segment for an 8086 program starts at address 740F016 …. 1.what number is stored in the CS register? 2.and IP contains 4C3D16 what is the physical address of the code? 7.What physical address is represented by the logical address 456D:34CD?

© Mike Stacey 2007 Memory Terminology (p1) RAM: Random access memory. Storage of volatile data – data and program that is currently being used by the processor. Volatile. ROM: Read only memory. Data/program that is stored and usually cannot be changed or overwritten. Non-volatile. Write: To store data into memory Read: To extract/read it out of memory

© Mike Stacey 2007 Types of RAM (p1) RAM  Static: storage element is the flip flop. Retains its data (1 or 0) while power is applied.  Dynamic: Uses the capacitor as a storage element. Loses its data if not constantly refreshed. Refresh every 2mS More capacity for a given size than static Cheaper than static

© Mike Stacey 2007 RAM (p1-p2) Note: For a 4 bit address bus there are 16 addressable locations inside the RAM chip. This is 2 4. Hence we need 4 address lines in the bus. We say the RAM has a capacity of 16Bytes if it can store 1 byte (8 bits in each location). Capacity can also be specified in bits, ie. 2 4 x 8 = 128bits The chip in Fig 3.1 is a 6116 RAM. What is its capacity? R/W: Read Write CS: Chip select OE: Output enable D 0 – D 3: 4 bit data bus Capacity = 2 8 * 4 = 1024bits

© Mike Stacey 2007 Writing to RAM (p2) Figure 3.2 – Write Cycle Write cycle time: Maximum time required to perform a write operation Data is written to the RAM when the R/W line is low and CS is low. Write Access time is the minimum time between application of address and the writing of data to RAM..

© Mike Stacey 2007 Reading from RAM (p2) Figure 3.3 – RAM Read Cycle Read cycle time Maximum time required to perform a read operation Data is read when OE is low and CS is low Read Access time is the minimum time between application of address and valid data appearing at the output of RAM..

© Mike Stacey 2007 ROM (p3) R/W: Read Write CS: Chip select OE: Output enable D 0 – D 7 : 8 bit data bus What is the capacity of this ROM in bytes?

© Mike Stacey 2007 Types of ROM (p3-p4) Mask Programmable ROM: Programmed in factory and program cannot be changed. Fusible Link Programmable ROM (PROM): Can be programmed once Erasable programmable ROM (EPROM): Can erase by exposure to UV light. After erasure, they can be re- programmed using a special burner. Electrically Erasable Programmable ROM (EEPROM): Can be erased electrically meaning no removal from circuit. Finite number of re-programs. Flash: a type of EEPROM. Read more about the different types of ROM and RAM in section 3 notes

© Mike Stacey 2007 ROM Applications (p4) Used wherever data needs to be permanently stored.  BIOS (Flash)  Decoding  Programs

© Mike Stacey 2007 Terminology (p4) Access Time: minimum time between application of address and valid data appearing at the output of RAM or data being written to RAM (write). Cycle Time: maximum time required to perform a READ or WRITE operation. Cell: storage for one bit of data Density: the number of cells for a given IC Dynamic: a form of RAM that requires refreshing Static: a form of RAM that does not require refreshing Location: a group of bits, generally one byte Volatile: memory that loses its data when power is removed Non Volatile: memory that does not lose its data when power is removed RAM: a form of volatile memory Read: obtain information from memory ROM: a form of non volatile memory Storage Capacity: the total number of bits that can be stored in memory, generally expressed in bytes or bits and factors of 2 10 (1024= 1k)

© Mike Stacey 2007 Typical RAM and Capacities (p5) Number of bits in each location Number of locationsCapacity in bits

© Mike Stacey 2007 Review Questions Do questions 1 – 11 from section 3 notes.