AIDA design review Davide Braga Steve Thomas ASIC Design Group 9 December 2008.

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Presentation transcript:

AIDA design review Davide Braga Steve Thomas ASIC Design Group 9 December 2008

AIDA design review2 Channel Layout Low/medium and High Energy channels in parallel Blocks are sequenced to follow signal’s flow (“left to right”) Shaper and peak hold at back end to minimize noise 400μm x 6mm 400um ~6mm preAmplifiers + feedback 700pF feedback cap. High speed buffer Fast compartors x10-slow comp Shapers PeakHolds + out multiplexer

9 December 2008AIDA design review3 Control signals Routed in the central region between high and low E.C.s routed differentially to limit crosstalk For 6mm long tracks time constant up to ~500ps: no need to regenerate reset signals

9 December 2008AIDA design review4 Feedback Capacitance Poly2 and substrate resistance quite high in this process: a single 700 pF cap would have a series resistance of several KΩ → substrate, top and bottom plate connections are distributed across the whole area of the capacitance Top plate connection Bottom plate connection Substrate connection

9 December 2008AIDA design review5 Power supply distribution Ground/power supply distributed vertically and horizontally across as many layers as possible to create grid with low resistance (hence to reduce voltage spikes due to current spikes) Metal2 Metal3 Metal4