Design & Co-design of Embedded Systems Sharif University of Technology Computer Engineering Dept. Fall-Winter 2005 Maziar Goudarzi

HW/SW Co-Design of Embedded Systems What we learned

Design & Co-design of Embedded Systems 3 HW/SW Co-Design of Embedded Systems: What we learned Introduction (Est.1-2 weeks. Actual: 2 weeks) –Review the evolution of HW design methodologies –Introduction to Embedded Systems (ES) –Overview of essential issues in system design System Specification (Est. 4-5 weeks. Actual: 5.5 weeks) –Various models of computation –SystemC language System Implementation (Est. 3-4 weeks, Actual 4 weeks) –Traditional style of ES design –Co-synthesis techniques & algorithms –New technologies: programmable SoC devices System Verification (Est. 1-2 weeks, Actual 1 week) –Overview of approaches –HW-SW co-simulation techniques Advanced Topics (Est. The rest. Actual 1 week) –Not covered: Platform-based design, ASIP-based design. Covered ODYSSEY Project: Object-orientation in ES design

Design & Co-design of Embedded Systems 4 What we learned in this course Introduction –Embedded Systems –HW/SW Codesign –CAD Issues in Codesign System Specification –SystemC Design Language (Library) –HW and System Design Using SystemC –HW/SW co-verification in SystemC

Design & Co-design of Embedded Systems 5 What we learned in this course (cont’d) HW/SW Co-Synthesis Algorithms –HW/SW Partitioning Algorithms –Distributed-System Co-Synthesis Algorithms –Co-Synthesis from OO Specifications Co-validation and Co-verification –An introduction + Tutorial on Formal and Semi-formal techniques Other topics –The ODYSSEY Project

Design & Co-design of Embedded Systems 6 Complementary Notes: Projects Phase 2, Sunday Day 11th –Phase two: Start implementing the system Oral presentation (15 min.) + report 2 (5-6 pages) Phase 3 (Final phase): –Final submission date: To be announced Please check the course web-page regularly –What to submit: Demonstrate working HW-SW system (may vary depending on your specific project) A paper-like report (max. 10 pages, IEEE format)