4 3 2 1 5 6 10 9 8 7 Counters

Objectives Upon completion of this chapter, you will be able to : Identify 2 different types of counter. Ripple -up counter, and Ripple-down counter Describe the operation of a 4-bit asynchronous ripple-up counter with the aid of a waveform diagram. Construct the truth table. State the maximum number of count. Describe the operation of a 4-bit asynchronous ripple-down counter with the aid of a waveform diagram.

Introduction Counters are used to count the number of binary pulses applied. Example : They make use of flip-flop. One flip-flop is able to store one bit. To be able to count “3 “ as in the example, two bits are required, hence two flip-flops must be used.

Calculation of maximum count value of a counter Let N = number of flip-flops. M = maximum count reached before a counter recycles. For N number of flip-flops, there are 2N counting states. The maximum count, M = 2N –1. Example : Determine the maximum count for a counter using 4 flip-flops. Solution : Given 4 flip-flops, therefore N = 4 Maximum count, M = 2N – 1 = 24 – 1 = 16 – 1 = 15

Type of Counters 4-Bit 4-Bit Asynchronous Asynchronous Up Counter Down Counter Tutorial

4 – Bit Asynchronous Up counter For the counter to count up, the Q-output of each flip-flop is connected to the clock input of the following flip-flop. The flip-flops are connected with J = K = 1 to operate in the toggle mode. The counter is clocked to count up. This type of counter where each flip-flop’s output serves as the CLK input signal for the next flip-flop, is referred to as an asynchronous counter. Only flip-flop A responds to clock pulses.

4 – Bit Asynchronous Up counter MSB LSB D C B A The counter will change state with each clock pulse 1 0 0 0 0 1 1 1 0 1 1 0 0 1 0 1 1 0 0 1 1 1 0 0 1 1 1 0 1 1 0 1 0 0 1 1 1 0 1 1 1 0 1 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 1 1 1 1 1 0 0 0 0 D J K C J K B J K A J K FF FF FF FF All J and K inputs assumed to be 1 Flip-flop are in toggle mode

Number of cycles Number of clock pulses D C B A 1 1 2 4 1 3 2 2 1 3 4 8 6 7 5 9 8 7 10 6 13 15 16 14 5 12 11 3 4 1 2 0 1 1 1 0 1 1 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 1 1 0 1 0 1 1 0 0 1 1 1 1 0 1 1 0 0 1 1 0 1 1 0 1 1 1 0 1 0 0 0 0 0 1 1 1 1 D J K C J K B J K A J K FF FF FF FF

Counter-waveforms showing frequency division by 2 for each Flip-flop Clk A B C D Flip-flops

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4 – Bit Asynchronous Down counter For the counter to count down, the output of each flip-flop is connected to the clock input of the following flip-flop. The flip-flops are connected with J = K = 1 to operate in the toggle mode. The counter is clocked to count down. This type of counter where each flip-flop’s output serves as the CLK input signal for the next flip-flop, is referred to as an asynchronous counter. Only flip-flop A responds to clock pulses.

4 – Bit Asynchronous Down counter LSB MSB D C B A The counter will change state with each clock pulse 0 1 0 0 0 0 1 1 0 1 0 1 0 0 0 0 1 1 1 1 0 0 0 1 0 0 1 0 0 1 1 0 1 1 0 1 1 1 1 0 1 1 1 1 0 1 1 1 1 1 0 0 1 0 0 0 1 0 0 1 1 0 1 1 1 0 1 0 C FF J K A B D All J and K inputs assumed to be 1 Flip-flop are in toggle mode

Number of cycles Number of clock pulses D C B A 1 1 2 2 1 4 3 3 2 1 4 7 5 8 6 12 11 13 15 16 10 14 9 4 3 2 5 1 8 7 6 1 0 0 1 0 1 1 1 1 0 1 0 1 0 0 0 1 1 0 1 0 1 1 0 1 1 1 0 1 1 0 0 1 0 1 1 0 0 0 1 0 0 0 0 1 1 1 1 1 1 1 1 0 0 1 0 0 0 1 1 0 1 0 1 0 1 0 0 C FF J K A B D

Counter-waveforms showing frequency division by 2 for each Flip-flop Clk A B C D Flip-flops

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Q 1 The maximum range which a 3-bit binary counter counts is from C J K B J K A J K FF FF FF A) 000 to 011. C) 011 to 110. 9 8 10 11 13 12 14 1 2 15 3 4 6 5 7 23 26 25 27 28 30 29 16 24 18 17 22 19 20 21 B) 000 to 111. D) 011 to 111.

Answer The maximum range which a 3-bit binary counter counts is from Q 1 The maximum range which a 3-bit binary counter counts is from C J K B J K A J K FF FF FF A) 000 to 011. C) 011 to 110. B) 000 to 111. D) 011 to 111.

All J and K inputs assumed to be 1 Q 2 Refer to the Fig. below. How many states does the counter have? C FF J K A B D All J and K inputs assumed to be 1 A) 3 states. C) 15 states. 11 9 10 14 8 13 12 4 2 1 3 15 6 5 7 19 26 25 27 28 30 29 16 24 18 17 23 20 21 22 B) 4 states. D) 16 states.

All J and K inputs assumed to be 1 Answer Q 2 Refer to the Fig. below. How many states does the counter have? C FF J K A B D All J and K inputs assumed to be 1 A) 3 states. C) 15 states. B) 4 states. D) 16 states.

All J and K inputs assumed to be 1 Q 3 The binary asychronous counter has an output of 0101. Determine the output after 3 clock pulses? 0 1 0 1 C FF J K A B D All J and K inputs assumed to be 1 A) 0111. C) 1001. 10 9 11 13 14 12 8 4 2 1 3 15 6 5 7 20 26 25 27 28 30 29 16 24 18 17 23 19 21 22 B) 1000. D) 1010.

All J and K inputs assumed to be 1 Answer Q 3 The binary asychronous counter has an output of 0101. Determine the output after 3 clock pulses? 0 1 0 1 C FF J K A B D All J and K inputs assumed to be 1 A) 0111. C) 1001. B) 1000. D) 1010.

All J and K inputs assumed to be 1 Q 4 The highest count of a 4 bit binary counter is equivalent to decimal? C FF J K A B D All J and K inputs assumed to be 1 A) 4. C) 16. 10 9 11 14 8 13 12 4 2 1 3 15 6 5 7 19 26 25 27 28 30 29 16 24 18 17 23 20 21 22 B) 15 D) 31.

All J and K inputs assumed to be 1 Answer Q 4 The highest count of a 4 bit binary counter is equivalent to decimal? C FF J K A B D All J and K inputs assumed to be 1 A) 4. C) 16. B) 15 D) 31.

Q 5 12 11 10 13 14 16 15 9 8 2 1 3 4 7 6 5 17 18 19 26 28 29 30 25 27 24 21 20 23 22 In order to connect up a circuit of JK flip-flops as an asynchronous up counter, you have to A) Set J=K= 1, connect Q output to the clock of the next flip- flop. B) Set J=K= 0, connect Q output to the clock of the next flip-flop C) Set J=K= 1, connect Q output to the clock of the next flip-flop. D) Set J=K= 0, connect Q output to the clock of the next flip-flop.

Answer Q 5 In order to connect up a circuit of JK flip-flops as an asynchronous up counter, you have to A) Set J=K= 1, connect Q output to the clock of the next flip-flop . B) Set J=K= 0, connect Q output to the clock of the next flip-flop . C) Set J=K= 1, connect Q output to the clock of the next flip-flop . D) Set J=K= 0, connect Q output to the clock of the next flip-flop .

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