Pulsar Status For Peter

L2 decision crate L1L1 TRACKTRACK SVTSVT CLUSTERCLUSTER PHOTONPHOTON MUONMUON Magic Bus α CPU Technical requirement: need a FAST way to collect/process many inputs…  With the technology available back then (1990s), had to design custom (alpha) processor & backplane (magicbus) …  had to deal with the fact that each data input was implemented in a different way …  6 different types of custom interface boards + custom processor & backplane … CDF L2 legacy decision Crate L2 decision crate electron Input: up to 50KHz Output: 300Hz

Gigabit Ethernet RF clock SRAMs Pulsar is designed to be: Modular, universal & flexible, fully self-testable (board &system level) All interfaces are bi-directional (Tx & Rx) Lego-style, open design … “In God we trust, everything else we test” Spare lines one for all and all for one user defined interfaces Personality cards Standard link another Pulsar or S-LINK to PCI Has ALL interfaces L2 decision crate has

Mezzanine slotsAUX card Pulsar (Pulser And Recorder) Design  modular/universal/self-testable Pulsar Custom mezzanine Bottom view Pulsar design philosophy: able to interface with any user data with any link format (e.g. S-LINK or GbE) via mezzanine Many applications within & outside CDF (compatible with Atlas) S-LINK  PCI  GbE works up to 100MHz Top view

PC SLINK Pulsar pre-processors L1 muon L1 XTRP L1 trigger TS L2 CAL (CLIST/Iso) PreFred ShowMax (RECES) SVT Muon Cluster Electron Merger SVT L2toTS Pulsar based new L2 decision Commissioning strategy: (1)Use Tx  Rx in teststand (2)Split all input signals, run parasitically with real system

PC SLINK Pulsar pre-processors L1 muon L1 XTRP L1 trigger TS ShowMax (RECES) SVT Muon Cluster Electron Merger SVT L2toTS System Integration: two main efforts  one between the two: SLINK fibers L2 CAL (CLIST/Iso) PreFred Trigger Room with beam Teststand Room Standalone

Main tasks for the project Hardware: custom: Pulsar, mezzanine cards, AUX, LVDS splitter commercial: fiber splitter, SLINK mezzanine, SLINK-PCI cards, Linux processors Firmware: transmitters and receivers for all data paths SLINK merger and L2 to trigger supervisor interfaces  about 14 different types of Pulsar firmware Software: board testing, VME DAQ readout, online/offline monitoring, infrastructure software for decision PC and L2 algorithm… Beam tests: beam tests  monitoring  firmware fine tuning

Main tasks: current status Hardware:  all hardware production/testing finished all custom hardware: no revision/blue wire on all prototypes RunIIa L2 muon Pulsar running in system since Sept Pulsar as SVT road warrior running in system since June 04 Firmware:  all firmware in place and fine tuning starts key to success: design for uniformity/modularity, CVS control, dedicated firmware developers (eng. students) Software:  core software in place and fine tuning starts Beam tests:  started last month beam tests  monitoring  firmware/software fine tuning

Pulsar to PC round trip timing measurement

Mini-DAQ with L2 trigger in test stand room RXPT TXPTTS Pulsar (L2TS) FRED (GL1) preFRED L2 Trigger Decision + TL2D Bank (Phase I) L2 Trigger Data TS L1A L2TS Pulsar Pulsar Merger Tx (SLINK fiber) PCPC TS handshaking (sending L2A/R, ROL, Buffer #)

Summary: we are in good shape All custom hardware production&testing finished All commercial hardware in hand and tested, tested new Linux PC and performance is excellent All firmware for 14 types of Pulsar in place and fine tuning on going All software for board testing, VME DAQ readout working; core online/offline software in place All core software for decision/control PCs and algorithm in place, ready for system integration Beam tests with real system in parasitic mode started  Our target is to test as much as possible of the new system in parasitic mode with beam before Aug shutdown

Pulsar production delivery time vs upgrade needs Time 06/04 01/05 07/05 10/05 Build 45 40? L2 Decision 9 (system) + 6 spare +15 (teststand Tx  Rx) SVT spare XFT spare

081 L2 Pulsar Muon/XTRP Rx IIa 083 L2 Pulsar SVT Road Warrior 085 L2 Pulsar Muon/XTRP/L1 Tx or SVT XTRP-emu 086 L2 Pulsar Muon/XTRP/L1 Rx IIb 087 L2 Pulsar RECES Tx 088 L2 Pulsar RECES Rx 089 L2 Pulsar Cluster/PreFred Tx 090 L2 Pulsar Cluster/PreFred Rx 091 L2 Pulsar SVT Tx 092 L2 Pulsar SVT Rx 093 L2 Pulsar Merger Tx 094 L2 Pulsar Merger Rx 095 L2 Pulsar L2TS “Tx” 096 L2 Pulsar L2TS 097 L2 Pulsar L1 Scaler 098 L2 Pulsar SVT TF 099 L2 Pulsar test Tx 100 L2 Pulsar test Rx 101 L2 Pulsar Stereo Tx 102 L2 Pulsar Stereo Rx One Hardware -- many Firmwares Board type Description Firmware Sakari Franco Tomi Sakari Tomi Sakari Tomi Vadim + Sakari Tomi Sakari Tomi Sakari What’s needed for phase I

SLINK Pulsar pre-processors L1 muon L1 XTRP L1 trigger ShowMax (RECES) SVT Muon Cluster Electron Merger SVT L2toTS System Integration: Part I in trigger room L2 CAL (CLIST/Iso) PreFred Trigger Room with beam Room Standalone Pulsar Rx Beam Tests Pulsar Monitoring Firmware Fine tune

Pulsar Crate in Trigger Room B0L2PU00 Muon XTRP L2 Muons Run IIa Level 2 Decision Crate  - Processor 1/3 RECES Reces Cluster SVT Connections: Fibers LVDS Slink Pulsar Test pattern CList Master CList ISOList Merger Slink Rx Pulsar Tx B0L2PU00 Level2_Pulsar_00