© 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights ReservedFloyd, Digital Fundamentals, 10 th ed Digital Logic Design Dr. Oliver Faust.

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© 2009 Pearson Education, Upper Saddle River, NJ All Rights ReservedFloyd, Digital Fundamentals, 10 th ed Digital Logic Design Dr. Oliver Faust © 2008 Pearson Education Chapter 9

© 2009 Pearson Education, Upper Saddle River, NJ All Rights ReservedFloyd, Digital Fundamentals, 10 th ed In this lecture we cover: 9-1 Basic Shift Register Operation 9-2 Serial -In / Serial--Out Shift Registers 9-3 Serial -In / Parallel--Out Shift Registers 9-4 Parallel -In / Serial--Out Shift Registers 9-5 Parallel -In / Parallel--Out Shift Registers

Registers and Counters  An n-bit register is a cascade of n flip-flops and can store an n-bit binary data  A counter can count occurrences of events and can generate timing intervals for control purposes

A Simple Shift Register

Performs both as a series-to-parallel and a parallel-to-series converter Parallel-Access Shift Register

© 2009 Pearson Education, Upper Saddle River, NJ All Rights ReservedFloyd, Digital Fundamentals, 10 th ed Next lecture covers: 8-1 Asynchronous Counters 8-2 Synchronous Counters 8-3 Up/Down Synchronous Counters 8-4 Design of Synchronous Counters