Industrial control system for a back-to-back multilevel NPC converter based on DSP and FPGA Marta Alonso, Francisco Huerta, Carlos Girón, Emilio Bueno, Álvaro Hernández, Francisco J. Rodriguez, Santiago Cóbreces Department of Electronics. Alcalá University ISIE2007 Alcalá UniversityDepartment of Electronics Researching group of Electronic Engineering applied to Renewable Energy Systems (GEISER)

Contents 1.Introduction 2.Proposed Control Electronic System 3.Computational and Coprocessor Module Design 4.FPGA implementation 5.Simulation Results 6.Conclusions Alcalá UniversityDepartment of Electronics ISIE2007 Researching group of Electronic Engineering applied to Renewable Energy Systems (GEISER)

Contents 1.Introduction 2.Proposed Control Electronic System 3.Computational and Coprocessor Module Design 4.FPGA implementation 5.Simulation Results 6.Conclusions Alcalá UniversityDepartment of Electronics ISIE2007 Researching group of Electronic Engineering applied to Renewable Energy Systems (GEISER)

1. Introduction (1/1) Alcalá UniversityDepartment of Electronics ISIE2007 Researching group of Electronic Engineering applied to Renewable Energy Systems (GEISER) ezDSP F turbine interface WIND TURBINE CONTROL USB communication CAN Bus Generator driving Exterior world communication (Ethernet, SCADA, etc.) CAN Bus FPGA SPARTAN III

Contents 1.Introduction 2.Proposed Control Electronic System 3.Computational and Coprocessor Module Design 4.FPGA implementation 5.Simulation Results 6.Conclusions Alcalá UniversityDepartment of Electronics ISIE2007 Researching group of Electronic Engineering applied to Renewable Energy Systems (GEISER)

Proposed Control Electronic System (1/2) Alcalá UniversityDepartment of Electronics ISIE2007 DSPFPGA Analog Signals Adaptation Data acquisition A/D conversion Driving of IGBTs. Faults of IGBT drivers. Driving of relays. Optical transmitters Optical receivers Analog signals Relays System references Processor Module Coprocessor Module To IGBT drivers Computational Module IGBT Swiching period  Tpwm=400μs. Sampling period  Ts=Tpwm/2=200 μs. Researching group of Electronic Engineering applied to Renewable Energy Systems (GEISER)

Proposed Control Electronic System (2/2) Alcalá UniversityDepartment of Electronics ISIE2007  Selection of DSP CharacteristicsFixed Point Floating Point Cost ☺☺☺☺ Data precision  Simplicity of programming ☺☺☺ Integrated peripherals       DSP TI TMS320C6713 Researching group of Electronic Engineering applied to Renewable Energy Systems (GEISER)  Selection of FPGA XC3S500E PQ208 (Spartan 3E of Xilinx): 500K system gates equivalent logical cells 232 maximum user I/O 360Kbit blocks RAM

Contents 1.Introduction 2.Proposed Control Electronic System 3.Computational and Coprocessor Module Design 4.FPGA implementation 5.Simulation Results 6.Conclusions Alcalá UniversityDepartment of Electronics ISIE2007 Researching group of Electronic Engineering applied to Renewable Energy Systems (GEISER)

Computational and coprocessor module design (1/3)  Task distribution: –Tasks with data dependences should be located in the same device –The lack of integrated periphery of the DSP selected are solved by the FPGA –High computational and repetitive tasks are implemented by the FPGA –Variable tasks are executed by the DSP –Non critical tasks are placed in the DSP Alcalá UniversityDepartment of Electronics ISIE2007 Researching group of Electronic Engineering applied to Renewable Energy Systems (GEISER) DSP High computational tasks: · Signal processing · Monitoring · User interface FPGA Concurrency, flexilibility and portability: · Data acquisition · Signal adapting · Data storage

Computational and coprocessor module design (2/3) Department of ElectronicsUniversity of Alcalá TasksTSTS T run Operation typeAlgorithm type Selected Device For the line-side converter Current vector controller200μs <200μs Trigonometric and matrix Control DSP Identification of different disturbances200μs FPGA DSC (Delay Signal Cancellation) [17]200μsFPGA SPLL [17]200μs Arithmetic DSP DC-bus voltage controller200μs Arithmetic DSP For the generator-side converter Vector controller.200μs <200μs Trigonometric and matrix Control DSP Turbine controller. Tracking of the maximum power point. 200μs ArithmeticDSP For the two converters PWM generation (carrier frequency 2.5KHz and 24 signals) 200μsArithmeticParallelFPGA Encoder reading200μs ArithmeticParallelFPGA Acquisition data200μs -ParallelFPGA ISIE2007 Researching group of Electronic Engineering applied to Renewable Energy Systems (GEISER)

Alcalá UniversityDepartment of Electronics ISIE2007 Computational and coprocessor module design (3/3) Researching group of Electronic Engineering applied to Renewable Energy Systems (GEISER)  Block diagram of the modules implemented in the FPGA

Contents 1.Introduction 2.Proposed Control Electronic System 3.Computational and Coprocessor Module Design 4.FPGA implementation 5.Simulation Results 6.Conclusions Alcalá UniversityDepartment of Electronics ISIE2007 Researching group of Electronic Engineering applied to Renewable Energy Systems (GEISER)

FPGA implementation: DSP-FPGA Synchronization (1/12) Alcalá UniversityDepartment of Electronics ISIE2007 Researching group of Electronic Engineering applied to Renewable Energy Systems (GEISER)

FPGA implementation: DSP-FPGA Synchronization (2/12) Alcalá UniversityDepartment of Electronics ISIE2007 SYNC signal: every 200μs. The PWM carrier signals are generated with a period of 400μs. At every maximum and minimum of these signals:SYNC is triggered  DSP external interruption is activated. FPGA acquires samples, while the DSP remains stalled until acquired data are available. The FPGA provides these data to the DSP, and the DSP transmits the new references for the FPGA PWM generator. Researching group of Electronic Engineering applied to Renewable Energy Systems (GEISER)

FPGA implementation:Acquisition of Analog Signals (3/12) Alcalá UniversityDepartment of Electronics ISIE2007 Researching group of Electronic Engineering applied to Renewable Energy Systems (GEISER)

FPGA implementation:Acquisition of Analog Signals (4/12)  Acquisition specifications:  12-bit precision  Sampling frequency: 5kHz  Synchronization (SYNC signal)  Simultaneous sampling of 20 channels (5 ADCs) Alcalá UniversityDepartment of Electronics ISIE2007 Researching group of Electronic Engineering applied to Renewable Energy Systems (GEISER)

FPGA implementation:Acquisition of Analog Signals (5/12) Alcalá UniversityDepartment of Electronics ISIE2007 Acquisition Finite State Machine Researching group of Electronic Engineering applied to Renewable Energy Systems (GEISER)

FPGA implementation: PWM generation (6/12) Alcalá UniversityDepartment of Electronics ISIE2007 Researching group of Electronic Engineering applied to Renewable Energy Systems (GEISER)

FPGA implementation: PWM generation (7/12) IGBTs are limited by a minimum swicthing time Alcalá UniversityDepartment of Electronics ISIE2007 Narrow pulses are removed: –Filtering –Changing reference signal Narrow pulses are extended Researching group of Electronic Engineering applied to Renewable Energy Systems (GEISER)

FPGA implementation: PWM generation (8/12) Alcalá UniversityDepartment of Electronics ISIE2007 THSPWM techniques Carrier generation Reference signal with zero sequence Modulated signals (with deadtime) Researching group of Electronic Engineering applied to Renewable Energy Systems (GEISER)

FPGA implementation: Speed measurement (9/12) Alcalá UniversityDepartment of Electronics ISIE2007 Researching group of Electronic Engineering applied to Renewable Energy Systems (GEISER)

FPGA implementation: Speed measurement (10/12) First method: –Encoder pulses are counted –Limitation: Low accuracy in high speed measurements Alcalá UniversityDepartment of Electronics ISIE2007 #pulses: number of counted pulses Linecount: number of encoder lines Tact: Time between two values are stored Acquisition Finite State Machine Researching group of Electronic Engineering applied to Renewable Energy Systems (GEISER) Second method: –Period of the encoder pulses is measured by using the clock signal of the FPGA –Limitation: Minimum speed with a 24 bit register  rpm

FPGA implementation: Speed measurement (11/12) Alcalá UniversityDepartment of Electronics ISIE2007 Researching group of Electronic Engineering applied to Renewable Energy Systems (GEISER) · 20ns ≈ 80μs · 20ns ≈ 160μs

FPGA implementation: Other peripherals (12/12) Alcalá UniversityDepartment of Electronics ISIE2007 Researching group of Electronic Engineering applied to Renewable Energy Systems (GEISER) Boot-loader. USB communication.

Contents 1.Introduction 2.Proposed Control Electronic System 3.Computational and Coprocessor Module Design 4.FPGA implementation 5.Experimental Results 6.Conclusions Alcalá UniversityDepartment of Electronics ISIE2007 Researching group of Electronic Engineering applied to Renewable Energy Systems (GEISER)

Experimental results (1/5) Alcalá UniversityDepartment of Electronics ISIE2007 Researching group of Electronic Engineering applied to Renewable Energy Systems (GEISER) TMS320C6713 DSK Acquisition block Compact Flash Optical transmitters and receivers Communication USB module FPGA XC3S250E

Experimental results: DSP execution (2/5) Alcalá UniversityDepartment of Electronics ISIE2007 Researching group of Electronic Engineering applied to Renewable Energy Systems (GEISER) TSTS Control algorithm execution k-1kk+1k+2 Number of cycles Execution graph

Universidad de AlcaláDepartamento de Electrónica Sampling time Frame size 128 Bytes124 Bytes64 Bytes 1 s<0,01% 200μs0,04%0,05%0,04% 10μs2,452,4%1,35% ISIE2007 Researching group of Electronic Engineering applied to Renewable Energy Systems (GEISER) Experimental results: USB communication (3/5) TSTS

Experimental results (4/5) Alcalá UniversityDepartment of Electronics ISIE2007 Researching group of Electronic Engineering applied to Renewable Energy Systems (GEISER)

Experimental results (5/5) Alcalá UniversityDepartment of Electronics ISIE2007 Researching group of Electronic Engineering applied to Renewable Energy Systems (GEISER)

Contents 1.Introduction 2.Proposed Control Electronic System 3.Computational and Coprocessor Module Design 4.FPGA implementation 5.Experimental Results 6.Conclusions Alcalá UniversityDepartment of Electronics ISIE2007 Researching group of Electronic Engineering applied to Renewable Energy Systems (GEISER)

Conclusions Alcalá UniversityDepartment of Electronics ISIE2007 Researching group of Electronic Engineering applied to Renewable Energy Systems (GEISER)  A novel real-time controller for a NPC multilevel converter based on a floating DSP and an FPGA has been presented.  The use of these two processors allows the parallel implementation of algorithms, increasing the processing rate.  It is necessary to achieve an optimal task distribution to improve the control electronic system performance.  This work has been focused to the implementation of the FPGA tasks.  The FPGA programming has been tested in the interface board, the communication between the different modules is right and the expected results have been achieved.

Industrial control system for a back-to-back multilevel NPC converter based on DSP and FPGA Marta Alonso, Francisco Huerta, Carlos Girón, Emilio Bueno, Álvaro Hernández, Francisco J. Rodriguez, Santiago Cóbreces Department of Electronics. Alcalá University ISIE2007 Alcalá UniversityDepartment of Electronics Researching group of Electronic Engineering applied to Renewable Energy Systems (GEISER) ACKNOWLEDGMENTS This work has been financied by the Spanish administration (ENE C04-01)