Based on An Engineering Approach to Computer Networking/ Keshav

Slides:



Advertisements
Similar presentations
Switching - Fabric An Engineering Approach to Computer Networking.
Advertisements

Ch. 10 Circuit Switching and Packet Switching
Lecture 4. Topics covered in last lecture Multistage Switching (Clos Network) Architecture of Clos Network Routing in Clos Network Blocking Rearranging.
PERMUTATION CIRCUITS Presented by Wooyoung Kim, 1/28/2009 CSc 8530 Parallel Algorithms, Spring 2009 Dr. Sushil K. Prasad.
CS 4700 / CS 5700 Network Fundamentals Lecture 7: Bridging (From Hub to Switch by Way of Tree) Revised 1/14/13.
Heiko Schröder, 2003 Parallel Architectures 1 Various communication networks State of the art technology Important aspects of routing schemes Known results.
Module 3.4: Switching Circuit Switching Packet Switching K. Salah.
1 Delta Network The delta network is one example of a multistage interconnection network that can be used as a switch fabric The delta network is an example.
Chapter 8 Switching Switching at the physical layer in the traditional telephone network uses the circuit-switching approach.
Switching Units.
4-1 Network layer r transport segment from sending to receiving host r on sending side encapsulates segments into datagrams r on rcving side, delivers.
Switching Units.
Lecture 5#1#1 הודעה לשבוע הבא !  שבוע הבא אני לא נימצא  המתרגל ניר אנדלמן יעביר את השיעור  לא ילמד חומר חדש  נוכחות רשות !
Shivkumar Kalyanaraman Rensselaer Polytechnic Institute 1 High Speed Router Design Shivkumar Kalyanaraman Rensselaer Polytechnic Institute
10 - Network Layer. Network layer r transport segment from sending to receiving host r on sending side encapsulates segments into datagrams r on rcving.
Chapter 10 Switching Fabrics. Outline Physical Interconnection Physical box with backplane Individual blades plug into backplane slots Each blade contains.
Guaranteed Smooth Scheduling in Packet Switches Isaac Keslassy (Stanford University), Murali Kodialam, T.V. Lakshman, Dimitri Stiliadis (Bell-Labs)
1 A Quantum self- Routing Packet Switching Manish Kumar Shukla, Rahul Ratan and A. Yavuz Oruc, Department of Electrical and Computer Engineering, University.
048866: Packet Switch Architectures Dr. Isaac Keslassy Electrical Engineering, Technion Scaling.
EE 4272Spring, 2003 Chapter 9: Circuit Switching Switching Networks Circuit-Switching Networks Circuit-Switching Concept  Space-Division Switching  Time-Division.
Lecture 11. Matching A set of edges which do not share a vertex is a matching. Application: Wireless Networks may consist of nodes with single radios,
Switching An Engineering Approach to Computer Networking.
CSE 291-a Interconnection Networks Lecture 7: February 7, 2007 Prof. Chung-Kuan Cheng CSE Dept, UC San Diego Winter 2007 Transcribed by Thomas Weng.
8.1 Chapter 8 Switching Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display.
Interconnection Networks in Multiprocessor Systems By: Wallun Chan Course: CS 147 Text: Chapter 12, p Professor: Sin-Min Lee.
Pipelined Two Step Iterative Matching Algorithms for CIOQ Crossbar Switches Deng Pan and Yuanyuan Yang State University of New York, Stony Brook.
Chapter 8 Switching Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. 8.# 1.
8.1 Chapter 8 Switching Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display.
Merits of a Load-Balanced AAPN 1.Packets within a flow are transported to their correct destinations in sequence. This is due to the 1:1 logical connection.
WAN technologies and routing Packet switches and store and forward Hierarchical addresses, routing and routing tables Routing table computation Example.
ATM SWITCHING. SWITCHING A Switch is a network element that transfer packet from Input port to output port. A Switch is a network element that transfer.
1 Copyright © Monash University ATM Switch Design Philip Branch Centre for Telecommunications and Information Engineering (CTIE) Monash University
1 Dynamic Interconnection Networks Miodrag Bolic.
Data and Computer Communications Chapter 10 – Circuit Switching and Packet Switching (Wide Area Networks)
Data and Computer Communications Circuit Switching and Packet Switching.
Switches and indirect networks Computer Architecture AMANO, Hideharu Textbook pp. 92~13 0.
EE384y EE384Y: Packet Switch Architectures Part II Scaling Crossbar Switches Nick McKeown Professor of Electrical Engineering and Computer Science,
Computer Networks: Switching and Queuing Ivan Marsic Rutgers University Chapter 4 – Switching and Queuing Delay Models.
Chapter 8 Switching Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display.
Guaranteed Smooth Scheduling in Packet Switches Isaac Keslassy (Stanford University), Murali Kodialam, T.V. Lakshman, Dimitri Stiliadis (Bell-Labs)
Lecture 4 Sorting Networks. Comparator comparator.
Circuit Switching Circuit switching networks,
Ch 8. Switching. Switch  Devices that interconnected with each other  Connecting all nodes (like mesh network) is not cost-effective  Some topology.
Data Communications, Kwangwoon University
Lecture Note on Switch Architectures. Function of Switch.
Throughput of Internally Buffered Crossbar Switch Saturday, February 20, 2016 Mingjie Lin
1 Kyung Hee University Chapter 8 Switching. 2 Kyung Hee University Switching  Switching  Switches are devices capable of creating temporary connections.
The Fork-Join Router Nick McKeown Assistant Professor of Electrical Engineering and Computer Science, Stanford University
Spring 2000CS 4611 Router Construction Outline Switched Fabrics IP Routers Extensible (Active) Routers.
Input buffered switches (1)
1 Kyung Hee University Chapter 8 Switching. 2 Kyung Hee University Switching  Switching  Switches are devices capable of creating temporary connections.
Structure of a switch We use switches in circuit-switched and packet- switched networks. In this section, we discuss the structures of the switches used.
McGraw-Hill©The McGraw-Hill Companies, Inc., 2000 Muhammad Waseem Iqbal Lecture # 20 Data Communication.
UNIT-II DIGITAL SWITCHING
EE384Y: Packet Switch Architectures Scaling Crossbar Switches
URL: Chapter 8 Switching Tel: (03) Ext: URL:
Packet Forwarding.
Lecture 2. Switching of physical circuits.
Packet Switching (basics)
CS 4700 / CS 5700 Network Fundamentals
Bridges and Extended LANs
CS 4700 / CS 5700 Network Fundamentals
Delta Network The delta network is one example of a multistage interconnection network that can be used as a switch fabric The delta network is an example.
Chapter 8 Circuit Switching and Telephone Network
An Engineering Approach to Computer Networking
Computer Networks: Switching and Queuing
Circuit Switch Design Principles
Design Principles of Scalable Switching Networks
Introduction and Overview
Presentation transcript:

Based on An Engineering Approach to Computer Networking/ Keshav Switching - Fabric Based on An Engineering Approach to Computer Networking/ Keshav

Communication Networks Switching Number of connections: from few (4 or 8) to huge (100,000s) 26-Apr-17 Communication Networks

Switching - Basic Assumptions continuous streams vs. packet by packet telephone connections no bursts no buffers connections change multicast Blocking external internal re-arrangeable strict sense non-blocking wide sense non-blocking 26-Apr-17 Communication Networks

Multiplexors and demultiplexors Multiplexor: aggregates sessions N input lines Output runs N times as fast as input Demultiplexor: distributes sessions one input line and N outputs that run N times slower Can cascade multiplexors 26-Apr-17 Communication Networks

Time division switching Key idea: when demultiplexing, position in frame determines output link Time division switching interchanges sample position within a frame: time slot interchange (TSI) 26-Apr-17 Communication Networks

Communication Networks Example - TSI sessions: (1,2) (2,4) (3,1) (4,3) TSI 2 4 1 3 4 3 2 1 26-Apr-17 Communication Networks

Communication Networks TSI Simple to build. Multicast Limit is the time taken to read and write to memory For 120,000 circuits need to read and write memory once every 125 microseconds each operation takes around 0.5 ns => impossible with current technology Need to look to other techniques 26-Apr-17 Communication Networks

Space division switching Each sample takes a different path through the switch, depending on its destination 26-Apr-17 Communication Networks

Communication Networks Crossbar Simplest possible space-division switch Crosspoints can be turned on or off 26-Apr-17 Communication Networks

Communication Networks Crossbar - example sessions: (1,2) (2,4) (3,1) (4,3) 1 2 input ports 3 4 4 1 2 3 output ports 26-Apr-17 Communication Networks

Communication Networks Crossbar Advantages: simple to implement simple control strict sense non-blocking Drawbacks number of crosspoints, N2 large VLSI space vulnerable to single faults 26-Apr-17 Communication Networks

Communication Networks Time-space switching Precede each input trunk in a crossbar with a TSI Delay samples so that they arrive at the right time for the space division switch’s schedule 1 MUX 2 1 2 3 MUX 4 3 4 26-Apr-17 Communication Networks

Communication Networks Time-Space: Example time 1 time 2 2 1 2 1 TSI 3 4 4 3 3 1 2 4 Internal speed = double link speed 26-Apr-17 Communication Networks

Communication Networks Finding the schedule Build a graph nodes - input links session connects an input and output nodes. Feasible schedule Computing a schedule compute perfect matching. 26-Apr-17 Communication Networks

Time-space-time (TST) switching Allowed to flip samples both on input and output trunk Gives more flexibility => lowers call blocking probability 26-Apr-17 Communication Networks

Circuit switching - Space division graph representation transmitter nodes receiver nodes internal nodes Feasible schedule edge disjoint paths. cost function number of crosspoints 26-Apr-17 Communication Networks

Communication Networks Example sessions: (1,3) (2,6) (3,1) (4,4) (5,2) (6,5) 1 2 3 4 5 6 1 2 3 4 5 6 26-Apr-17 Communication Networks

Communication Networks Clos Network Clos(N, n , k) N - inputs/outputs; nxk (N/n)x(N/n) kxn 2x2 3x3 2x2 N=6 n=2 k=2 2x2 3x3 2x2 26-Apr-17 Communication Networks

Clos Network - strict sense non-blocking Holds for k >= 2n-1 Proof: Consider and idle input and output Input box connected to at most n-1 middle layer switches output box connected to at most n-1 middle layer switches There exists a "free" middle switch. 26-Apr-17 Communication Networks

Communication Networks Proof 26-Apr-17 Communication Networks

Communication Networks Example Clos(8,2,3) 2x3 4x4 3x2 2x3 4x4 3x2 N=8 n=2 k=3 2x3 3x2 4x4 2x3 3x2 26-Apr-17 Communication Networks

Clos Network - rearrangable Holds for k >= n Proof: Consider all input and output find a perfect matching. route the perfect matching remaining network is Clos(N-n,n-1,k-1) summary: smaller circuit weaker guarantee Mulicast ? 26-Apr-17 Communication Networks

An example for blocking when k=n Clos Network An example for blocking when k=n nxk (N/n)x(N/n) kxn N=6 n=2 k=2 3x3 2x2

Rearrangable Clos Network – routing algorithm Start at some arbitrary 2x2 input switch, and route it to its destination through the upper switch. Route the other output port of the 2x2 switch you reached to its input port through the lower switch. If the other port in the input switched you reached has not been routed yet, route it through the upper middle switch. Otherwise, select an arbitrary input port switch that was not yet used, and repeat the procedure. 26-Apr-17 Communication Networks

Recursive constructions 1 1 . . N/2 x N/2 N/2 x N/2 n n 26-Apr-17 Communication Networks

Communication Networks Algorithm Complexity N routing steps for each level Log n levels to do ===> N log n Given parallel hardware: O(N) time 26-Apr-17 Communication Networks

Alternative View of the problem A graph coloring problem: Input/output switches = nodes A match = link Middle stage switches = colors This is the well known “Coloring of bi-partite graph” problem. Heuristics fail miserably!!! 26-Apr-17 Communication Networks

Another algorithm – matrix based Specification matrix: Rows = input switches (nxm, 1..r) Columns = middle switches (rxr, N/n = r, 1..m) Content = output switches (1..r) We need an algorithms that will fill up the matrix with a feasible routing: Same number cannot appear in the same column Works also for CLOS with redundancy 26-Apr-17 Communication Networks

Communication Networks Algorithm Principle For e=0,1,2,… balance the destination e among the columns Challenges: efficiency termination We describe an Algorithm by Lee, Hwang, and Carpinelli, T. Comm. 44 (11), Nov. 1996 26-Apr-17 Communication Networks

Communication Networks The Matrix Meaning 1 2x3 4x4 3x2 2x3 4x4 3x2 2x3 3x2 4x4 2x3 3x2 26-Apr-17 Communication Networks

Communication Networks The Matrix Meaning 1 2x3 4x4 3x2 1 3 4 7 5 6 2 2x3 4x4 3x2 2x3 3x2 4x4 2x3 3x2 26-Apr-17 Communication Networks

Communication Networks The Matrix Meaning 1 2x3 4x4 3x2 1 2 3 2x3 4x4 3x2 2x3 3x2 4x4 2x3 3x2 26-Apr-17 Communication Networks

Communication Networks Illegal example 1 2 3 2x2 2x2 1 2 3 2x2 4x4 2x2 2x2 2x2 4x4 2x2 2x2 26-Apr-17 Communication Networks

Communication Networks Legal example 1 2 3 2x2 2x2 1 2 3 2x2 4x4 2x2 2x2 2x2 4x4 2x2 2x2 26-Apr-17 Communication Networks

Communication Networks Notation N=nxr j e nxm rxr mxn nxm i rxr mxn r rows nxm mxn rxr nxm mxn m columns 26-Apr-17 Communication Networks

Communication Networks Data Structures (j,e), j=0,1,…n-1, e=0,1,…,r-1 :- the set of rows {i} such that sij=e All the input switches routed to e thru j 0(e), e=0,1,r-1 :- the set of columns {j} such that Si does not contain e All middle switches that are not routing to e 2(e), e=0,1,r-1 :- the set of columns {j} such that Si contains e at least twice All middle switches that have contention routing to e 26-Apr-17 Communication Networks

Communication Networks Algorithm (Next Simple Swap) If e> sik i’  2nd element of (j,e) repeat step 3 on i’ if e> si’k goto step 5 (Successive Swap) u  e; remove k from 0(u) if |(j,u)|=2 remove j from 2(u) v  sik swap sij with sik remove i from (j,u) and (k,v) add i to (j,v) and (k,u) if e<v if |(k,v)|=0 add k to 0(v) if |(k,v)|=1 remove k from 2(v) if |(j,v)|=1 remove j from 0(v) if |(j,v)|=2 add j to 2(v) goto step 1 if e>v uv i element in (j,u) goto step 5B Init: e=0 If 2(e) empty ee+1 if e=r stop; else goto 1 if 2(e) j  1st element of 2(e) k 1st element of 0(e) (simple swap) i 1st element of (j,e) if e< sik swap sij with sik e’  sik remove i from (j,e) and (k,e’) add i to (j,e’) and (k,e) if |(j,e)|=1 remove j from 2(e) if |(j,e’)|=1 remove j from 0(e’) if |(j,e’)|=2 add j to 2(e’) if |(k,e’)|=0 add k to 0(e’) if |(k,e’)|=1 remove k from 2(e’) remove k from 0(e) goto step 1 26-Apr-17 Communication Networks

Algorithm Complexity adding an element to a set, choosing/removing the 1st/2nd element from a set take O(1)  steps 5A 5B and 5D each take O(1) time removing a generally positioned element from an r-set takes O(r) time  step 5C time complexity is in O(r) [ 2(v)-{k}, 0(v)-{j} ] the looping in step 5 does not contain step 5C, only 5B and 5D  the time complexity for step 5 is O(r) Algorithm time complexity O(nr2) 26-Apr-17 Communication Networks

Communication Networks Clos network size Number of switching elements is given by for k=n (rearrangeable non-blocking) Optimal value for n is n=sqrt{N/2}, which yields 26-Apr-17 Communication Networks

a lower bound for the number of switching elements? Assume we have 2x2 switching units. We have N! switching permutation Can we achieve this bound? 26-Apr-17 Communication Networks

Communication Networks Benes Networks Size: 2 log N –1 stages N/2 switches in each stage N log2 N –N/2 Rearrangeable Clos network with k=2 n=2 Symmetry Example. proof 26-Apr-17 Communication Networks

Recursive constructions - Benes Network 1 1 . . N/2 x N/2 N/2 x N/2 n n 26-Apr-17 Communication Networks

Communication Networks Example 16x16 26-Apr-17 Communication Networks

Strict Sense non-Blocking N/2 x N/2 . . N/2 x N/2 N/2 x N/2 26-Apr-17 Communication Networks

Communication Networks Cantor Networks m copies of Benes network. For m >= log N it is strict sense non-blocking Network size N log2 N Example: m=4 26-Apr-17 Communication Networks

Communication Networks Banyan Self routing! Size: log2 N stages N/2 switches in each stage 0.5N log2 N elements This is less than the lower bound! 26-Apr-17 Communication Networks

Communication Networks Banyan 111 110 26-Apr-17 Communication Networks

Communication Networks Other Banyans 26-Apr-17 Communication Networks

How do deal with internal blocking in Banyan speed – up internal buffers Batcher bitonic sorter 26-Apr-17 Communication Networks

Communication Networks Batcher sorter size n=log N sorters with 1,2,3,.. Columns Each column has N/2 switches 26-Apr-17 Communication Networks