SDR Architectures Bilal Saqib

Software Execution Procedure in SDR  SDR should be compatible with various hardwares and softwares. 1

Hardware & Software Division  Hardware Analog Digital  Software Basic Program  Radio Function Libraries  OS and Device Drivers Application Program 1

Conventional Software Execution Procedure 1

Software Execution Procedure for SDR 1

Single-Chip Architecture for SDR  Hybrid Architecture Reconfigurable Signal Processors Accelerators Additional Hardware Circuits Programmable State Machine (PSM) Central Processing Unit (CPU) Crossbar type Connections  By changing configuration programs of RSP and Accelerator parameters, SDR LSI can be reconfigured to operate with many wireless communication systems. 2

Block Diagram of SDR LSI 2

RSP 2

2

Accelerators 2

PSM 2

Evaluation Board 2

References 1.Yoshida, H.; Tsurumi, H.; Suzuki, Y., "Broadband RF front-end and software execution procedure in software-defined radio," Vehicular Technology Conference, VTC Fall. IEEE VTS 50th, vol.4, no., pp vol.4, 1999 URL: pdf?isnumber=17259&prod=STD&arnumber= &arnumber=797315&arSt=2133&ared=2137+v ol.4&arAuthor=Yoshida%2C+H.%3B+Tsurumi%2C+H.%3B+Suzuki%2C+Y. 2.Whitepaper on Single-Chip Baseband Signal Processor for Software-Defined Radio by Seiichi Nishijima, Miyoshi Saito and Iwao SugiyamaSingle-Chip Baseband Signal Processor for Software-Defined Radio