Copyright Agrawal, 2009ELEC5270/6270 Spring 11, Lecture 41 ELEC 5270/6270 Spring 2011 Low-Power Design of Electronic Circuits Linear Programming – A Mathematical.

Slides:



Advertisements
Similar presentations
Tuesday, March 5 Duality – The art of obtaining bounds – weak and strong duality Handouts: Lecture Notes.
Advertisements

ECE Longest Path dual 1 ECE 665 Spring 2005 ECE 665 Spring 2005 Computer Algorithms with Applications to VLSI CAD Linear Programming Duality – Longest.
Copyright Agrawal, 2011Lectures 8 and 9,: Linear Programming1 CSV881: Low-Power Design Linear Programming – A Mathematical Optimization Technique Vishwani.
10/28/2009VLSI Design & Test Seminar1 Diagnostic Tests and Full- Response Fault Dictionary Vishwani D. Agrawal ECE Dept., Auburn University Auburn, AL.
UMass Lowell Computer Science Analysis of Algorithms Prof. Karen Daniels Fall, 2002 Lecture 8 Tuesday, 11/19/02 Linear Programming.
Leakage and Dynamic Glitch Power Minimization Using MIP for V th Assignment and Path Balancing Yuanlin Lu and Vishwani D. Agrawal Auburn University ECE.
ELEC Digital Logic Circuits Fall 2008 Logic Minimization (Chapter 3) Vishwani D. Agrawal James J. Danaher Professor Department of Electrical and.
Introduction to Linear and Integer Programming
Compaction of Diagnostic Test Set for a Full-Response Dictionary Mohammed Ashfaq Shukoor Vishwani D. Agrawal 18th IEEE North Atlantic Test Workshop, 2009.
Minimum Dynamic Power CMOS Circuit Design by a Reduced Constraint Set Linear Program Tezaswi Raja Vishwani Agrawal Michael L. Bushnell Rutgers University,
1 Linear Programming Jose Rolim University of Geneva.
Aug 23, ‘021Low-Power Design Minimum Dynamic Power Design of CMOS Circuits by Linear Program Using Reduced Constraint Set Vishwani D. Agrawal Agere Systems,
UMass Lowell Computer Science Analysis of Algorithms Prof. Karen Daniels Fall, 2006 Lecture 9 Wednesday, 11/15/06 Linear Programming.
Nov 29th 2006MS Thesis Defense1 Minimizing N-Detect Tests for Combinational Circuits Master’s Defense Kalyana R. Kantipudi Thesis Advisor: Dr. Vishwani.
11/17/05ELEC / Lecture 201 ELEC / (Fall 2005) Special Topics in Electrical Engineering Low-Power Design of Electronic Circuits.
Aug 31, '02VDAT'02: Low-Power Design1 Minimum Dynamic Power Design of CMOS Circuits by Linear Program Using Reduced Constraint Set Tezaswi Raja, Rutgers.
1 Introduction to Linear and Integer Programming Lecture 9: Feb 14.
Introduction to Linear and Integer Programming Lecture 7: Feb 1.
Spring 08, Apr 1 ELEC 7770: Advanced VLSI Design (Agrawal) 1 ELEC 7770 Advanced VLSI Design Spring 2008 Testability Measures Vishwani D. Agrawal James.
Fall 2006, Sep. 5 and 7 ELEC / Lecture 4 1 ELEC / (Fall 2006) Low-Power Design of Electronic Circuits (Formerly ELEC / )
9/08/05ELEC / Lecture 51 ELEC / (Fall 2005) Special Topics in Electrical Engineering Low-Power Design of Electronic Circuits.
A Two Phase Approach for Minimal Diagnostic Test Set Generation Mohammed Ashfaq Shukoor Vishwani D. Agrawal 14th IEEE European Test Symposium Seville,
Nov. 8, 001Low-Power Design Digital Circuit Design for Minimum Transient Energy Vishwani D. Agrawal Circuits and Systems Research Lab, Agere Systems (Bell.
9/20/05ELEC / Lecture 81 ELEC / (Fall 2005) Special Topics in Electrical Engineering Low-Power Design of Electronic Circuits.
Spring 08, Feb 14 ELEC 7770: Advanced VLSI Design (Agrawal) 1 ELEC 7770 Advanced VLSI Design Spring 2008 Linear Programming – A Mathematical Optimization.
Approximation Algorithms
Spring 08, Feb 28 ELEC 7770: Advanced VLSI Design (Agrawal) 1 ELEC 7770 Advanced VLSI Design Spring 2008 Retiming Vishwani D. Agrawal James J. Danaher.
Fall 2006, Nov. 30 ELEC / Lecture 12 1 ELEC / (Fall 2006) Low-Power Design of Electronic Circuits Test Power Vishwani D.
Copyright Agrawal, 2007 ELEC6270 Fall 07, Lecture 8 1 ELEC 5270/6270 Fall 2007 Low-Power Design of Electronic Circuits Linear Programming – A Mathematical.
May 28, 2003Minimum Dynamic Power CMOS1 Minimum Dynamic Power CMOS Circuits Vishwani D. Agrawal Rutgers University, Dept. of ECE Piscataway, NJ 08854
Jan 6-10th, 2007VLSI Design A Reduced Complexity Algorithm for Minimizing N-Detect Tests Kalyana R. Kantipudi Vishwani D. Agrawal Department of Electrical.
Copyright Agrawal, 2007 ELEC6270 Fall 07, Lecture 9 1 ELEC 5270/6270 Fall 2007 Low-Power Design of Electronic Circuits Test Power Vishwani D. Agrawal James.
Penn ESE535 Spring DeHon 1 ESE535: Electronic Design Automation Day 5: February 2, 2009 Architecture Synthesis (Provisioning, Allocation)
Jan. 2007VLSI Design '071 Statistical Leakage and Timing Optimization for Submicron Process Variation Yuanlin Lu and Vishwani D. Agrawal ECE Dept. Auburn.
Fall 2006, Sep. 26, Oct. 3 ELEC / Lecture 7 1 ELEC / (Fall 2006) Low-Power Design of Electronic Circuits Dynamic Power:
Jan. 6, 2006VLSI Design '061 On the Size and Generation of Minimal N-Detection Tests Kalyana R. Kantipudi Vishwani D. Agrawal Department of Electrical.
Fall 06, Sep 14 ELEC / Lecture 5 1 ELEC / (Fall 2006) Low-Power Design of Electronic Circuits (Formerly ELEC / )
February 4, 2009Shukoor: MS Thesis Defense1 Fault Detection and Diagnostic Test Set Minimization Master’s Defense Mohammed Ashfaq Shukoor Dept. of ECE,
Spring 08, Feb 6 ELEC 7770: Advanced VLSI Design (Agrawal) 1 ELEC 7770 Advanced VLSI Design Spring 2008 Timing Verification and Optimization Vishwani D.
Penn ESE535 Spring DeHon 1 ESE535: Electronic Design Automation Day 5: February 2, 2009 Architecture Synthesis (Provisioning, Allocation)
Spring 07, Mar 13, 15 ELEC 7770: Advanced VLSI Design (Agrawal) 1 ELEC 7770 Advanced VLSI Design Spring 2007 Linear Programming – A Mathematical Optimization.
Computational Geometry Piyush Kumar (Lecture 5: Linear Programming) Welcome to CIS5930.
Design Techniques for Approximation Algorithms and Approximation Classes.
Logical Topology Design
Exact and heuristics algorithms
CSE 589 Part VI. Reading Skiena, Sections 5.5 and 6.8 CLR, chapter 37.
Approximation Algorithms Department of Mathematics and Computer Science Drexel University.
Spring 2014, Feb 26...ELEC 7770: Advanced VLSI Design (Agrawal)1 ELEC 7770 Advanced VLSI Design Spring 2014 Linear Programming – A Mathematical Optimization.
IE 312 Review 1. The Process 2 Problem Model Conclusions Problem Formulation Analysis.
TU/e Algorithms (2IL15) – Lecture 12 1 Linear Programming.
Spring 2010, Feb 22...ELEC 7770: Advanced VLSI Design (Agrawal)1 ELEC 7770 Advanced VLSI Design Spring 2010 Linear Programming – A Mathematical Optimization.
Linear Programming Piyush Kumar Welcome to CIS5930.
TU/e Algorithms (2IL15) – Lecture 12 1 Linear Programming.
Linear Programming for Solving the DSS Problems
ELEC Digital Logic Circuits Fall 2014 Logic Minimization (Chapter 3)
The Simplex Method The geometric method of solving linear programming problems presented before. The graphical method is useful only for problems involving.
VLSI Testing Lecture 7: Combinational ATPG
ELEC Digital Logic Circuits Fall 2014 Logic Testing (Chapter 12)
ELEC 5270/6270 Spring 2015 Low-Power Design of Electronic Circuits Linear Programming – A Mathematical Optimization Technique Vishwani D. Agrawal James.
ELEC 7770 Advanced VLSI Design Spring 2016 Linear Programming – A Mathematical Optimization Technique Vishwani D. Agrawal James J. Danaher Professor ECE.
ELEC 7770 Advanced VLSI Design Spring 2012 Retiming
Vishwani D. Agrawal James J. Danaher Professor
ELEC 5270/6270 Spring 2013 Low-Power Design of Electronic Circuits Linear Programming – A Mathematical Optimization Technique Vishwani D. Agrawal James.
Vishwani D. Agrawal James J. Danaher Professor
A Primal-Dual Solution to Minimal Test Generation Problem
VLSI Testing Lecture 7: Combinational ATPG
Vishwani D. Agrawal James J. Danaher Professor
ELEC 7770 Advanced VLSI Design Spring 2016 Retiming
VLSI Testing Lecture 4: Testability Analysis
Lecture 6 – Integer Programming Models
Presentation transcript:

Copyright Agrawal, 2009ELEC5270/6270 Spring 11, Lecture 41 ELEC 5270/6270 Spring 2011 Low-Power Design of Electronic Circuits Linear Programming – A Mathematical Optimization Technique Vishwani D. Agrawal James J. Danaher Professor Dept. of Electrical and Computer Engineering Auburn University, Auburn, AL

Copyright Agrawal, 2009ELEC5270/6270 Spring 11, Lecture 42 What is Linear Programming Linear programming (LP) is a mathematical method for selecting the best solution from the available solutions of a problem. Method: State the problem and define variables whose values will be determined. Develop a linear programming model: Write the problem as an optimization formula (a linear expression to be minimized or maximized) Write a set of linear constraints An available LP solver (computer program) gives the values of variables.

Copyright Agrawal, 2009ELEC5270/6270 Spring 11, Lecture 43 Types of LPs LP – all variables are real. ILP – all variables are integers. MILP – some variables are integers, others are real. A reference: S. I. Gass, An Illustrated Guide to Linear Programming, New York: Dover, 1990.

Copyright Agrawal, 2009ELEC5270/6270 Spring 11, Lecture 44 A Single-Variable Problem Consider variable x Problem: find the maximum value of x subject to constraint, 0 ≤ x ≤ 15. Solution: x = Constraint satisfied x Solution x = 15

Copyright Agrawal, 2009ELEC5270/6270 Spring 11, Lecture 45 Single Variable Problem (Cont.) Consider more complex constraints: Maximize x, subject to following constraints: x ≥ 0(1) 5x ≤ 75(2) 6x ≤ 30(3) x ≤ 10(4) x (1) (2) (3) (4) All constraints satisfied Solution, x = 5

Copyright Agrawal, 2009ELEC5270/6270 Spring 11, Lecture 46 A Two-Variable Problem Manufacture of chairs and tables: Resources available: Material: 400 boards of wood Labor: 450 man-hours Profit: Chair: $45 Table: $80 Resources needed: Chair 5 boards of wood 10 man-hours Table 20 boards of wood 15 man-hours Problem: How many chairs and how many tables should be manufactured to maximize the total profit?

Copyright Agrawal, 2009ELEC5270/6270 Spring 11, Lecture 47 Formulating Two-Variable Problem Manufacture x 1 chairs and x 2 tables to maximize profit: P = 45x x 2 dollars Subject to given resource constraints: 400 boards of wood,5x x 2 ≤ 400(1) 450 man-hours of labor,10x x 2 ≤ 450(2) x 1 ≥ 0(3) x 2 ≥ 0 (4)

Copyright Agrawal, 2009ELEC5270/6270 Spring 11, Lecture 48 Solution: Two-Variable Problem Chairs, x 1 Tables, x 2 (1) (2) (24, 14) Profit increasing decresing P = 2200 P = 0 Best solution: 24 chairs, 14 tables Profit = 45× ×14 = 2200 dollars (3) (4) Material constraint Man-power constraint

Copyright Agrawal, 2009ELEC5270/6270 Spring 11, Lecture 49 Change Profit of Chair to $64/Unit Manufacture x 1 chairs and x 2 tables to maximize profit: P = 64x x 2 dollars Subject to given resource constraints: 400 boards of wood,5x x 2 ≤ 400(1) 450 man-hours of labor,10x x 2 ≤ 450(2) x 1 ≥ 0(3) x 2 ≥ 0 (4)

Copyright Agrawal, 2009ELEC5270/6270 Spring 11, Lecture 410 Solution: $64 Profit/Chair Chairs, x 1 Tables, x 2 (1) (2) Profit increasing decresing P = 2880 P = 0 Best solution: 45 chairs, 0 tables Profit = 64× ×0 = 2880 dollars (24, 14) (3) (4) Material constraint Man-power constraint

Copyright Agrawal, 2009ELEC5270/6270 Spring 11, Lecture 411 A Dual Problem Explore an alternative. Questions: Should we make tables and chairs? Or, auction off the available resources? To answer this question we need to know: What is the minimum price for the resources that will provide us with same amount of revenue from sale as the profits from tables and chairs? This is the dual of the original problem.

Copyright Agrawal, 2009ELEC5270/6270 Spring 11, Lecture 412 Formulating the Dual Problem Revenue received by selling off resources: For each board, w 1 For each man-hour, w 2 Minimize 400w w 2 Subject to constraints: 5w w 2 ≥ 45 20w w 2 ≥ 80 w 1 ≥ 0 w 2 ≥ 0 Resources: Material: 400 boards Labor: 450 man-hrs Profit: Chair: $45 Table: $80 Resources needed: Chair 5 boards of wood 10 man-hours Table 20 boards of wood 15 man-hours

Copyright Agrawal, 2009ELEC5270/6270 Spring 11, Lecture 413 The Duality Theorem If the primal has a finite optimum solution, so does the dual, and the optimum values of the objective functions are equal. If the primal has a finite optimum solution, so does the dual, and the optimum values of the objective functions are equal.

Copyright Agrawal, 2009ELEC5270/6270 Spring 11, Lecture 414 Primal-Dual Problems Primal problem Fixed resources Maximize profit Variables: x 1 (number of chairs) x 2 (number of tables) Maximize profit 45x 1 +80x 2 Subject to: 5x x 2 ≤ x x 2 ≤ 450 x 1 ≥ 0 x 2 ≥ 0 Solution: x 1 = 24 chairs, x 2 = 14 tables Profit = $2200 Dual Problem Fixed profit Minimize value Variables: w 1 ($ value/board of wood) w 2 ($ value/man-hour) Minimize value 400w w 2 Subject to: 5w w 2 ≥ 45 20w w 2 ≥ 80 w 1 ≥ 0 w 2 ≥ 0 Solution: w 1 = $1, w 2 = $4 value = $2200

Copyright Agrawal, 2009ELEC5270/6270 Spring 11, Lecture 415 LP for n Variables n minimize Σ cj xjObjective function j =1 n subject to Σ aij xj ≤ bi, i = 1, 2,..., m j =1 n Σ cij xj = di, i = 1, 2,..., p j =1 Variables: xj Constants: cj, aij, bi, cij, di

Copyright Agrawal, 2009ELEC5270/6270 Spring 11, Lecture 416 Algorithms for Solving LP Simplex method Simplex method G. B. Dantzig, Linear Programming and Extension, Princeton, New Jersey, Princeton University Press, G. B. Dantzig, Linear Programming and Extension, Princeton, New Jersey, Princeton University Press, Ellipsoid method Ellipsoid method L. G. Khachiyan, “A Polynomial Algorithm for Linear Programming,” Soviet Math. Dokl., vol. 20, pp , L. G. Khachiyan, “A Polynomial Algorithm for Linear Programming,” Soviet Math. Dokl., vol. 20, pp , Interior-point method Interior-point method N. K. Karmarkar, “A New Polynomial-Time Algorithm for Linear Programming,” Combinatorica, vol. 4, pp , N. K. Karmarkar, “A New Polynomial-Time Algorithm for Linear Programming,” Combinatorica, vol. 4, pp , Course website of Prof. Lieven Vandenberghe (UCLA), Course website of Prof. Lieven Vandenberghe (UCLA),

Copyright Agrawal, 2009ELEC5270/6270 Spring 11, Lecture 417 Basic Ideas of Solution methods Constraints Extreme points Objective function Constraints Extreme points Objective function Simplex: search on extreme points. Complexity: polynomial in n, number of variables Interior-point methods: Successively iterate with interior spaces of analytic convex boundaries. Complexity: O(n 3.5 L), L = no. of int. values

Copyright Agrawal, 2009ELEC5270/6270 Spring 11, Lecture 418 Integer Linear Programming (ILP) Variables are integers. Variables are integers. Complexity is exponential – higher than LP. Complexity is exponential – higher than LP. LP relaxation LP relaxation Convert all variables to real, preserve ranges. Convert all variables to real, preserve ranges. LP solution provides guidance. LP solution provides guidance. Rounding LP solution can provide a non- optimal solution. Rounding LP solution can provide a non- optimal solution.

Copyright Agrawal, 2009ELEC5270/6270 Spring 11, Lecture 419 Traveling Salesperson Problem (TSP)

Copyright Agrawal, 2009ELEC5270/6270 Spring 11, Lecture 420 Solving TSP: Five Cities Distances (dij) in miles (symmetric TSP, general TSP is asymmetric) City j=1 j=1 j=2 j=2j=3j=4j=5 i=1 i= i=2 i= i=3 i= i=4 i= i=5 i=

Copyright Agrawal, 2009ELEC5270/6270 Spring 11, Lecture 421 Search Space: No. of Tours Asymmetric TSP tours Asymmetric TSP tours Five-city problem: 4 × 3 × 2 × 1 = 24 tours Five-city problem: 4 × 3 × 2 × 1 = 24 tours Ten-city problem: 362,880 tours Ten-city problem: 362,880 tours 15-city problem: 87,178,291,200 tours 15-city problem: 87,178,291,200 tours 50-city problem: 49! = 6.08×10 tours 50-city problem: 49! = 6.08×10 62 tours Time for enumerative search assuming 1 μs per tour evaluation=1.93×10 years Time for enumerative search assuming 1 μs per tour evaluation=1.93×10 55 years

Copyright Agrawal, 2009ELEC5270/6270 Spring 11, Lecture 422 A Greedy Heuristic Solution City j = 1 j = 2j = 3j = 4j = 5 i = 1 (start) i = i = i = i = Tour length = = 60 miles (non-optimal)

Copyright Agrawal, 2009ELEC5270/6270 Spring 11, Lecture 423 ILP Variables, Constants and Constraints d14 = 12 d15 = 27 d12 = 18 d13 = 10 x14 ε [0,1] x15 ε [0,1] x12 ε [0,1] x13 ε [0,1] x12 + x13 + x14 + x15 = 1 four other similar equations Integer variables: xij = 1, travel i to j xij = 0, do not travel i to j Real constants: dij = distance from i to j

Copyright Agrawal, 2009ELEC5270/6270 Spring 11, Lecture 424 Objective Function and ILP Solution 5 i - 1 Minimize ∑ ∑ xij × dij i = 1 j = 1 xij xij j =1 j =12345 i =1 i = ∑ xij = 1, for all i, i.e., every node i has exactly one outgoing edge. j = 1 j ≠ i

Copyright Agrawal, 2009ELEC5270/6270 Spring 11, Lecture 425 ILP Solution d13 = 10 d45 = 6 Total length = 45 but not a single tour d54 = 6 d21 = 18 d32 = 5

Copyright Agrawal, 2009ELEC5270/6270 Spring 11, Lecture 426 Additional Constraints for Single Tour Following constraints prevent split tours. For any subset S of cities, the tour must enter and exit that subset: Following constraints prevent split tours. For any subset S of cities, the tour must enter and exit that subset: ∑ xij ≥ 2 for all S, |S| < 5 i ε S j ε S Any subset Remaining set At least two arrows must cross this boundary.

Copyright Agrawal, 2009ELEC5270/6270 Spring 11, Lecture 427 ILP Solution d13 = 10 d41 = 12 Total length = 53 d54 = 6 d25 = 20 d32 = 5

Copyright Agrawal, 2009ELEC5270/6270 Spring 11, Lecture 428 Characteristics of ILP Worst-case complexity is exponential in number of variables. Worst-case complexity is exponential in number of variables. Linear programming (LP) relaxation, where integer variables are treated as real, gives a lower bound on the objective function. Linear programming (LP) relaxation, where integer variables are treated as real, gives a lower bound on the objective function. Recursive rounding of relaxed LP solution to nearest integers gives an approximate solution to the ILP problem. Recursive rounding of relaxed LP solution to nearest integers gives an approximate solution to the ILP problem. K. R. Kantipudi and V. D. Agrawal, “A Reduced Complexity Algorithm for Minimizing N-Detect Tests,” Proc. 20 th International Conf. VLSI Design, January 2007, pp K. R. Kantipudi and V. D. Agrawal, “A Reduced Complexity Algorithm for Minimizing N-Detect Tests,” Proc. 20 th International Conf. VLSI Design, January 2007, pp

Copyright Agrawal, 2009ELEC5270/6270 Spring 11, Lecture 429 Why ILP Solution is Exponential? LP solution found in polynomial time (bound on ILP solution) Must try all 2 n roundoff points First variable Second variable Constraints Objective (maximize)

Copyright Agrawal, 2009ELEC5270/6270 Spring 11, Lecture 430 ILP Example: Test Minimization A combinational circuit has n test vectors that detect m faults. Each test detects a subset of faults. Find the smallest subset of test vectors that detects all m faults. A combinational circuit has n test vectors that detect m faults. Each test detects a subset of faults. Find the smallest subset of test vectors that detects all m faults. ILP model: ILP model: Assign an integer variable ti ε [0,1] to ith test vector Ti such that ti = 1 means we select Ti, otherwise Assign an integer variable ti ε [0,1] to ith test vector Ti such that ti = 1 means we select Ti, otherwise ti = 0 means we eliminate Ti Define an integer constant fij ε [0,1] such that Define an integer constant fij ε [0,1] such that fij = 1, if ith vector Ti detects jth fault Fj, otherwise fij = 0, if ith vector Ti does not detect jth fault Fj Values of constants fij are determined by fault simulation

Test Data T1T2T3T4--Ti--Tn F F F F Fj Fm Copyright Agrawal, 2009ELEC5270/6270 Spring 11, Lecture 431 n tests m faults fij = 1; vector Ti detects fault Fj Select test Ti if ti = 1

Copyright Agrawal, 2009ELEC5270/6270 Spring 11, Lecture 432 Test Minimization by ILP n minimize Σ ti Objective function i =1 n subject to Σ fij ti ≥ 1, j = 1, 2,..., m i =1

Copyright Agrawal, 2009ELEC5270/6270 Spring 11, Lecture 433 Four-Bit ALU Circuit Pseudorandom vectors for 100% fault coverage ILP solution Minimized vectors CPU s , , , ,384 (2 14, exhaustive set) inputs, 8 outputs

Copyright Agrawal, 2009ELEC5270/6270 Spring 11, Lecture 434 Finding LP/ILP Solvers R. Fourer, D. M. Gay and B. W. Kernighan, AMPL: A Modeling Language for Mathematical Programming, South San Francisco, California: Scientific Press, Several of programs described in this book are available to Auburn users. R. Fourer, D. M. Gay and B. W. Kernighan, AMPL: A Modeling Language for Mathematical Programming, South San Francisco, California: Scientific Press, Several of programs described in this book are available to Auburn users. B. R. Hunt, R. L. Lipsman, J. M. Rosenberg, K. R. Coombes, J. E. Osborn and G. J. Stuck, A Guide to MATLAB for Beginners and Experienced Users, Cambridge University Press, B. R. Hunt, R. L. Lipsman, J. M. Rosenberg, K. R. Coombes, J. E. Osborn and G. J. Stuck, A Guide to MATLAB for Beginners and Experienced Users, Cambridge University Press, Search the web. Many programs with small number of variables can be downloaded free. Search the web. Many programs with small number of variables can be downloaded free.

A Circuit Optimization Problem Given: Given: Circuit netlist Circuit netlist Cell library with multiple versions for each cell Cell library with multiple versions for each cell Select cell versions to optimize a specified characteristic of the circuit. Typical characteristics are: Select cell versions to optimize a specified characteristic of the circuit. Typical characteristics are: Area Area Power Power Delay Delay Example: Minimize power for given delay. Example: Minimize power for given delay. Copyright Agrawal, 2009ELEC5270/6270 Spring 11, Lecture 435

Gate Library: NAND(X), X = 0 or 1 X: an integer variable for each gate. X: an integer variable for each gate. X = 0, choose gate with small delay X = 0, choose gate with small delay Delay = d × fo, where fo = number of fanouts for gate Delay = d × fo, where fo = number of fanouts for gate Power = 3 × p × fo Power = 3 × p × fo d and p are parameters of technology d and p are parameters of technology X = 1, choose gate with low power X = 1, choose gate with low power Delay = 2 × d × fo Delay = 2 × d × fo Power = 0.5 × p × fo Power = 0.5 × p × fo Normalized gate delay = [(1 – X) + 2 X] × fo Normalized gate delay = [(1 – X) + 2 X] × fo Normalized power = [3(1 – X) X] × fo Normalized power = [3(1 – X) X] × fo Normalization: d = 1, p = 1 Normalization: d = 1, p = 1 Copyright Agrawal, 2009ELEC5270/6270 Spring 11, Lecture 436

Spring 2010, Feb 1ELEC 7770: Advanced VLSI Design (Agrawal)37 Example: One-Bit Full Adder ABCABC CO SUM Number of fanouts, fo

Spring 2010, Feb 1ELEC 7770: Advanced VLSI Design (Agrawal)38 Define Arrival Time Variables, Tk ABCABC CO SUM Number of fanouts, fo T1 = T2 = T3 = 0 T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T12 T11 Tk = Latest signal arrival time at output of gate k

Constraint: Gate k in the Circuit Ti = signal arrival time at ith input of gate k Ti = signal arrival time at ith input of gate k Tk = signal arrival time at gate k output Tk = signal arrival time at gate k output Tk ≥ Ti + (1 – Xk) fo(k) + 2 Xk fo(k), for all i Tk ≥ Ti + (1 – Xk) fo(k) + 2 Xk fo(k), for all i Where, fo(k) = fanout number of gate k Where, fo(k) = fanout number of gate k Xk = 0, choose fast cell for k Xk = 1, choose low power cell for k Copyright Agrawal, 2009ELEC5270/6270 Spring 11, Lecture 439

Spring 2010, Feb 1ELEC 7770: Advanced VLSI Design (Agrawal)40 Arrival Time Constraints on Gate 7 ABCABC CO SUM Number of fanouts, fo T1 = T2 = T3 = 0 T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T12 T11 T7 ≥ T5 + (1 – X7) X7 ✕ 2 T7 ≥ T6 + (1 – X7) X7 ✕ 2

Clock Constraints Ti = 0, for all primary inputs i Ti = 0, for all primary inputs i To ≤ Tc, clock period, for all primary outputs o To ≤ Tc, clock period, for all primary outputs o Copyright Agrawal, 2009ELEC5270/6270 Spring 11, Lecture 441 Combinational Logic Register Clock

Spring 2010, Feb 1ELEC 7770: Advanced VLSI Design (Agrawal)42 Critical Path Constraints ABCABC CO SUM Number of fanouts, fo T1 = T2 = T3 = 0 T1 T2 T3 T4 T5 T6 T7 T8 T9 ≤ Tc T10 T12 ≤ Tc T11

Optimization Function Minimize ∑ 3(1 – Xk) fo(k) Xk fo(k) Minimize ∑ 3(1 – Xk) fo(k) Xk fo(k) all gates k all gates k Copyright Agrawal, 2009ELEC5270/6270 Spring 11, Lecture 443

Typical Result Copyright Agrawal, 2009ELEC5270/6270 Spring 11, Lecture 444 Normalized delay (Tc) Normalized power (11, 45) (22, 7.5)