K.T. McDonald  BooNe Electronics Meeting Jan. 13, 2009 1  BooNE Comments on  BooNE Readout Parameters Based on the Electronics Meeting of Jan. 7, 2009.

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K.T. McDonald  BooNe Electronics Meeting Jan. 13,  BooNE Comments on  BooNE Readout Parameters Based on the Electronics Meeting of Jan. 7, 2009 Kirk T. McDonald Princeton University (Jan. 9, 2009) Participants: L. Camilieri, H. Chen, J. Harder, K. McDonald, V. Radeka, C. Thorn, J. Wu, B. Yu

K.T. McDonald  BooNe Electronics Meeting Jan. 13,  BooNE Overview The meeting focused on the relation between the signal shapes in a long-drift LAr TPC and front-end electronics requirements. For tracks with up to 2.5 m drift, as in  BooNE, diffusion limits the high-frequency components of the signal shapes. Hence, the design of the TPC wire planes, and the front-end readout might best be optimized by taking effects of diffusion into account, which has been done assuming a particular value for diffusion. However, there is an ambiguity as to the magnitude of diffusion in LAr. A powerful tool in thinking about TPC signals shapes is the weighting method (a variant of Green’s reciprocation theorem introduced by S. Ramo): ) See B. Yu’s presentation, DocDB #257 for examples relevant to  BooNE. My conclusions from this meeting are that we should consider: Reducing the wire spacing to 2 mm. Reducing the gap between the wire planes to 2 mm. Reducing the ADC sampling frequency to 2.5 MHz. Increasing the number of ADC bits to 14. Keeping the low-frequency roll-off above 2.5 kHz to preserve full resultion for transverse tracks up to 50 cm. Keeping the liquid argon level below the location of the FETs.

K.T. McDonald  BooNe Electronics Meeting Jan. 13,  BooNE Diffusion The transverse (and longitudinal) diffusion coefficient D in liquid argon at E = 500 V/cm is believed by ICARUS (S. Sergiampietri) to be D = 4.8 cm 2 /s = 4.8e-4 m 2 /s. The  BooNE design is based on D = 15 cm 2 /s, which is taken from Fig 1. of a report by Doke, which reanalyses data reported in My own reanalysis of Derenzo’s result gives D = 6.3 cm 2 /s The drift velocity of electrons in these conditions is about v = 1.6 mm/  s = 1600 m/s. The rms diffusion of an electron that drifts distance x is  =  (2Dx/v), so for the maximum drift in  BooNE, x = 2.5 m, the maximum rms diffusion is  max = 1.2 mm if D = 4.8 cm2/s, and 2.1 mm if D = 15 cm 2 /s. The rest of this note considers the implications of D = 4.8 cm 2 /s, rather than 15 m 2 /s. The average diffusion is  diff = (2/3)  max = 0.8 mm, for electrons that are uniformly distributed in space. The achieved spatial resolution in the TPC is the convolution of  diff with the rms resolution due to effects of wire spacing and the readout electronics. This suggests that  BooNE could benefit from finer resolution than that associated with the present baseline design of 3 mm wire spacing, and 3 mm between wire planes.

K.T. McDonald  BooNe Electronics Meeting Jan. 13,  BooNE Two-Track Resolution Perpendicular to the Wire Planes The spatial resolution perpendicular to the wire planes is limited by induction effects whose characteristic length is the spacing between the readout wire planes. B. Yu has illustrated this for signals on the Y (vertical) wire plane due to a track parallel to that plane. To improve the 2-track resolution to ~ 2.5 mm, the “shaping” time should not be larger than  diff = 0.8  s. This suggests that the ADC sampling interval be 0.4  s, i.e, 2.5 MHz. The 1-  s “peaking time” either represents the effect of “shaping” without diffusion, or  diff without “shaping”. Two tracks separated by 2.5  s = 4 mm could barely be resolved. This is limited by the 3-mm wire-plane spacing. This suggests that we reduce the wire-plane spacing from 3 mm to, say, 2 mm. ? Would the wire carriers, based on multilayer PC boards, still be mechanically viable at this spacing? While the signal size on the collection (Y) plane is unaffected by the wire-plane spacing, the signals on the induction planes (U-V) would be reduced by ~ 2/3.

K.T. McDonald  BooNe Electronics Meeting Jan. 13,  BooNE Two-Track Resolution Parallel to the Wire Planes The spatial resolution parallel to the wire planes is limited by induction effects whose characteristic length is the wire spacing. If we improve the resolution perpendicular to the wire planes, we should also consider improving it parallel to the wire planes by reducing the wire spacing from 3 to 2 mm. This would increase the channel count, and the forces on the wire cage, by a factor of 1.5, from 10,000 to 15, 000. If the system cost is $100/wire, the additional cost would be ~ $500k. If  BooNE is to serve as a demonstration of the excellent potential of a LAr TPC to reconstruct neutrino interactions, it should do so with the best possible resolution. Hence (to me) the cost increment to achieve resolution limited by diffusion over long drifts, rather than electronics, is well justified.

K.T. McDonald  BooNe Electronics Meeting Jan. 13,  BooNE ADC Sampling Frequency From slide 4: To improve the 2-track resolution to ~ 2.5 mm, the “shaping” time should not be larger than  diff = 0.8  s. Suppose we chose a “shaping” time of 0.8  s. Then the rms width of signals due to tracks parallel to the wire planes (the most favorable geometry) would vary between 0.8 and 1.4  s This suggests that the ADC sampling interval be 0.4  s, i.e, 2.5 MHz, which would preserve full sensitivity (Nyquist-Shannon) even for the highest-frequency signals (from tracks created close to the wire planes. We could choose a “shaping” time smaller than 0.8  s, and adopt a corresponding higher ADC sampling rate.  Additional information about the high-frequency structure from tracks created close to the wire planes. However, the frequency content is limited by wire/plane spacing EXCEPT for the “spikes” associated with charge collection on neighboring Y wires. Track at 45° Track at 85° 2.5 MHz sampling  25 samples/box

K.T. McDonald  BooNe Electronics Meeting Jan. 13,  BooNE ADC Bits The high-frequency structure seen above for “no diffusion” is due to “spikes” in induction when electrons are collected on neighboring Y wires. In practice, we will not observe this structure due to the smoothing effects of diffusion and electronic shaping. B. Yu’s simulation showed that while the signals from tracks parallel to the wire planes are similar in size in the U, V and Y planes, the signals from tracks perpendicular to the wire planes are much smaller in the U and V planes than in the Y plane. This suggests that we increase the gain on the U and V wires, and increase the ADC dynamic range from 12 to 14 bits (~ $1 cost increase per channel). [dE/dx resolution will be largely due to the Y wires, so we could keep 12 bits and give up the upper end of the U and V dynamic range.]

K.T. McDonald  BooNe Electronics Meeting Jan. 13,  BooNE Low-Frequency Roll-Off It is desirable to protect the system against low-frequency noise (microphonics) by a high-pass filter in the “shaping” network. In J. Harder’s design, this RC filter is located on the cable drive board, which is to be just outside the feedthroughs on the cryostat. The full drift time in  BooNE is 1.6 ms over 2.5 m. If we wish to maintain full resolution for the small class of tracks that are perpendicular to the wire planes and ~ 2.5 m long, then the low-frequency roll-off should be at 600 Hz (or lower). However, a transverse momentum of 150 MeV corresponds to a transverse track length in LAr of ~ 70 cm; and we are most concerned if this occurs for an electron/photon, with 14 cm radiation length. Hence, it suffices to maintain full resolution over only cm,  roll-off at ~ 2.5 kHZ.

K.T. McDonald  BooNe Electronics Meeting Jan. 13,  BooNE Where Should the Liquid Level Be? The best noise performance of the front-end FET’s is obtained around 120K. The self heating of the FETs in liquid argon is not enough to raise their temperature without special encapsulation (HELIOS expt.) However, if the FETs are in argon gas above liquid argon, the self heating of the FETs should bring them up from 87K to near the desired 120K. [This should be verified in bench tests at BN L.] Hence, it is desirable that the liquid-argon level in  BooNE be below the location of the FETs (and of course above the top of the wire cage). A side benefit of this would be that the electronics would generate very little heat in the liquid, and hence generate very few bubbles. Since it may be that bubble generation is associated with charge separation (S. Pordes, DocDB 190) that reduces the electron “lifetime”, bubbles are to be minimized.