Portable and Predictable Performance on Heterogeneous Embedded Manycores (ARTEMIS ) ARTEMIS 3 rd Project Review October 2015 WP6 – Space Demonstrator – Performance Prediction Ricardo Moreno (TAS-E) 1

Industrial rationale In bid phase necessary a fast prototyping and architecture design to satisfy customer needs No time for full deployment and assesment General requirements such as # of MIPS Normally based on experience Choose among HW / SW implementations Sizing of this HW / SW implementations to achieve demanded functionalities and performances HW: FPGA family and model SW: number of cores 2 ARTEMIS PaPP Review 2015

Use case 3 Standard CCSDS 122: Lossless compression Implementation: ARTEMIS PaPP Review 2015

Execution on real platform ARTEMIS PaPP Review 20144

Performance prediction ARTEMIS PaPP Review Machine models from running a characterizer program on target 2.Task-graph model of task-based application with Performance extractor 3.Predict the performance on the target using the machine model and application model

Performance prediction execution ARTEMIS PaPP Review 20146

7 Primary objective 1: performance models of applications executing on computational platforms Predicted vs real performance Primary objective 2: Portability of performance across at least two hardware platforms for the application use cases Portability from x86_64 to Leon platform Primary objective 3: Portability of the software stack across application domains. Portability to aerospace domain Primary objective 4: Software developer productivity is increased OpenMP requires lower programmer skills compared to other parallel programming paradigms Achievement of project objectives ARTEMIS PaPP Review 2015

8 Performance prediction allows sizing of architecture No need of invest resources on HW deployment Reduce risk towards customer Reduce time and costs Industrial benefits ARTEMIS PaPP Review 2015