Chapter 2 — Instructions: Language of the Computer — 1 Memory Operands Main memory used for composite data – Arrays, structures, dynamic data To apply.

Slides:



Advertisements
Similar presentations
Goal: Write Programs in Assembly
Advertisements

Review of the MIPS Instruction Set Architecture. RISC Instruction Set Basics All operations on data apply to data in registers and typically change the.
Instruction Set-Intro
Lecture 5: MIPS Instruction Set
1 ECE462/562 ISA and Datapath Review Ali Akoglu. 2 Instruction Set Architecture A very important abstraction –interface between hardware and low-level.
ECE 15B Computer Organization Spring 2010 Dmitri Strukov Lecture 5: Data Transfer Instructions / Control Flow Instructions Partially adapted from Computer.
CS1104 – Computer Organization PART 2: Computer Architecture Lecture 5 MIPS ISA & Assembly Language Programming.
ELEN 468 Advanced Logic Design
CS3350B Computer Architecture Winter 2015 Lecture 4
Systems Architecture Lecture 5: MIPS Instruction Set
Chapter 2 Instructions: Language of the Computer
Chapter 2.
Chapter 2 Instructions: Language of the Computer Part III.
CS2100 Computer Organisation MIPS Part III: Instruction Formats (AY2014/2015) Semester 2.
Instructions Set Bo Cheng Instruction Set Design An Instruction Set provides a functional description of a processor. It is the visible.
ECE 15B Computer Organization Spring 2010 Dmitri Strukov Lecture 4: Arithmetic / Data Transfer Instructions Partially adapted from Computer Organization.
1 Lecture 2: MIPS Instruction Set Today’s topic:  MIPS instructions Reminder: sign up for the mailing list cs3810 Reminder: set up your CADE accounts.
Lecture 5 Sept 14 Goals: Chapter 2 continued MIPS assembly language instruction formats translating c into MIPS - examples.
Lecture 4 Sept 9 Goals: Amdahl’s law Chapter 2 MIPS assembly language instruction formats translating c into MIPS - examples.
Instruction Representation I (1) Fall 2005 Lecture 05: INSTRUCTION REPRESENTATION.
COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Hao Ji.
CS 300 – Lecture 6 Intro to Computer Architecture / Assembly Language Instructions.
C OMPUTER O RGANIZATION AND D ESIGN The Hardware/Software Interface 5 th Edition Chapter 2 Instructions: Language of the Computer.
CMPT 334 Computer Organization
1  2004 Morgan Kaufmann Publishers Instructions: bne $t4,$t5,Label Next instruction is at Label if $t4≠$t5 beq $t4,$t5,Label Next instruction is at Label.
Lecture Objectives: 1)Define the terms least significant bit and most significant bit. 2)Explain how unsigned integer numbers are represented in memory.
CS224 Fall 2011 Chap 2a Computer Organization CS224 Fall 2011 Chapter 2 a With thanks to M.J. Irwin, D. Patterson, and J. Hennessy for some lecture slide.
Computer Organization and Architecture Instructions: Language of the Machine Hennessy Patterson 2/E chapter 3. Notes are available with photocopier 24.
IFT 201: Unit 1 Lecture 1.3: Processor Architecture-3
Chapter 2 CSF 2009 The MIPS Assembly Language: Introduction to Binary System.
CPS3340 COMPUTER ARCHITECTURE Fall Semester, /08/2013 Lecture 10: MIPS Instructor: Ashraf Yaseen DEPARTMENT OF MATH & COMPUTER SCIENCE CENTRAL STATE.
Chapter 2 CSF 2009 The MIPS Assembly Language. Stored Program Computers Instructions represented in binary, just like data Instructions and data stored.
EET 4250 Instruction Representation & Formats Acknowledgements: Some slides and lecture notes for this course adapted from Prof. Mary Jane Penn.
DR. SIMING LIU SPRING 2016 COMPUTER SCIENCE AND ENGINEERING UNIVERSITY OF NEVADA, RENO Session 9 Binary Representation and Logical Operations.
DR. SIMING LIU SPRING 2016 COMPUTER SCIENCE AND ENGINEERING UNIVERSITY OF NEVADA, RENO Session 7, 8 Instruction Set Architecture.
Chapter 2 Instructions: Language of the Computer Part IIa Number Representation.
CS Computer Organization Numbers and Instructions Dr. Stephen P. Carl.
Chapter 2 Instructions: Language of the Computer.
COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Yaohang Li.
Computer Architecture & Operations I
Computer Architecture & Operations I
MIPS Assembly.
COMPUTER ARCHITECTURE & OPERATIONS I
Morgan Kaufmann Publishers
Lecture 4: MIPS Instruction Set
ELEN 468 Advanced Logic Design
The University of Adelaide, School of Computer Science
Computer Architecture (CS 207 D) Instruction Set Architecture ISA
Computer Architecture & Operations I
Instructions - Type and Format
Lecture 4: MIPS Instruction Set
The University of Adelaide, School of Computer Science
Systems Architecture I (CS ) Lecture 5: MIPS Instruction Set*
CSCI206 - Computer Organization & Programming
The University of Adelaide, School of Computer Science
Systems Architecture Lecture 5: MIPS Instruction Set
Computer Architecture & Operations I
MIPS Instruction Encoding
The University of Adelaide, School of Computer Science
MIPS Instruction Encoding
Chapter 2 Instructions: Language of the Computer
Instruction encoding The ISA defines Format = Encoding
Computer Instructions
Computer Architecture
Instruction encoding The ISA defines Format = Encoding
UCSD ECE 111 Prof. Farinaz Koushanfar Fall 2018
COMS 361 Computer Organization
Instruction encoding The ISA defines Format = Encoding
Instruction encoding The ISA defines Format = Encoding
Systems Architecture I (CS ) Lecture 5: MIPS Instruction Set*
Presentation transcript:

Chapter 2 — Instructions: Language of the Computer — 1 Memory Operands Main memory used for composite data – Arrays, structures, dynamic data To apply arithmetic operations – Load values from memory into registers – Store result from register to memory Memory is byte addressed – Each address identifies an 8-bit byte Words are aligned in memory – Address must be a multiple of 4 MIPS is Big Endian – Most-significant byte at least address of a word – c.f. Little Endian: least-significant byte at least address

Chapter 2 — Instructions: Language of the Computer — 2 Memory Operand Example 1 C code: g = h + A[8]; – g in $s1, h in $s2, base address of A in $s3 Compiled MIPS code: – Index 8 requires offset of 32 4 bytes per word lw $t0, 32($s3) # load word add $s1, $s2, $t0 offset base register

Chapter 2 — Instructions: Language of the Computer — 3 Memory Operand Example 2 C code: A[12] = h + A[8]; – h in $s2, base address of A in $s3 Compiled MIPS code: – Index 8 requires offset of 32 lw $t0, 32($s3) # load word add $t0, $s2, $t0 sw $t0, 48($s3) # store word

Chapter 2 — Instructions: Language of the Computer — 4 Registers vs. Memory Registers are faster to access than memory Operating on memory data requires loads and stores – More instructions to be executed Compiler must use registers for variables as much as possible – Only spill to memory for less frequently used variables – Register optimization is important!

Chapter 2 — Instructions: Language of the Computer — 5 Immediate Operands Constant data specified in an instruction addi $s3, $s3, 4 No subtract immediate instruction – Just use a negative constant addi $s2, $s1, -1 Design Principle 3: Make the common case fast – Small constants are common – Immediate operand avoids a load instruction

Chapter 2 — Instructions: Language of the Computer — 6 The Constant Zero MIPS register 0 ($zero) is the constant 0 – Cannot be overwritten Useful for common operations – E.g., move between registers add $t2, $s1, $zero

Chapter 2 — Instructions: Language of the Computer — 7 Unsigned Binary Integers Given an n-bit number Range: 0 to +2 n – 1 Example = 0 + … + 1× ×2 2 +1×2 1 +1×2 0 = 0 + … = Using 32 bits 0 to +4,294,967,295

Chapter 2 — Instructions: Language of the Computer — 8 2s-Complement Signed Integers Given an n-bit number Range: –2 n – 1 to +2 n – 1 – 1 Example = –1× × … + 1×2 2 +0×2 1 +0×2 0 = –2,147,483, ,147,483,644 = –4 10 Using 32 bits –2,147,483,648 to +2,147,483,647

Chapter 2 — Instructions: Language of the Computer — 9 2s-Complement Signed Integers Bit 31 is sign bit – 1 for negative numbers – 0 for non-negative numbers –(–2 n – 1 ) can’t be represented Non-negative numbers have the same unsigned and 2s-complement representation Some specific numbers – 0: … 0000 – –1: … 1111 – Most-negative: … 0000 – Most-positive: … 1111

Chapter 2 — Instructions: Language of the Computer — 10 Signed Negation Complement and add 1 – Complement means 1 → 0, 0 → 1 Example: negate = … –2 = … = …

Chapter 2 — Instructions: Language of the Computer — 11 Sign Extension Representing a number using more bits – Preserve the numeric value In MIPS instruction set – addi : extend immediate value – lb, lh : extend loaded byte/halfword – beq, bne : extend the displacement Replicate the sign bit to the left – c.f. unsigned values: extend with 0s Examples: 8-bit to 16-bit – +2: => – –2: =>

Chapter 2 — Instructions: Language of the Computer — 12 Representing Instructions Instructions are encoded in binary – Called machine code MIPS instructions – Encoded as 32-bit instruction words – Small number of formats encoding operation code (opcode), register numbers, … – Regularity! Register numbers – $t0 – $t7 are reg’s 8 – 15 – $t8 – $t9 are reg’s 24 – 25 – $s0 – $s7 are reg’s 16 – 23

Chapter 2 — Instructions: Language of the Computer — 13 MIPS R-format Instructions Instruction fields – op: operation code (opcode) – rs: first source register number – rt: second source register number – rd: destination register number – shamt: shift amount (00000 for now) – funct: function code (extends opcode) oprsrtrdshamtfunct 6 bits 5 bits

Chapter 2 — Instructions: Language of the Computer — 14 R-format Example add $t0, $s1, $s2 special$s1$s2$t00add = oprsrtrdshamtfunct 6 bits 5 bits

Chapter 2 — Instructions: Language of the Computer — 15 Hexadecimal Base 16 – Compact representation of bit strings – 4 bits per hex digit c d a1010e b1011f1111 Example: eca

Chapter 2 — Instructions: Language of the Computer — 16 MIPS I-format Instructions Immediate arithmetic and load/store instructions – rt: destination or source register number – Constant: –2 15 to – 1 – Address: offset added to base address in rs Design Principle 4: Good design demands good compromises – Different formats complicate decoding, but allow 32-bit instructions uniformly – Keep formats as similar as possible oprsrtconstant or address 6 bits5 bits 16 bits

Chapter 2 — Instructions: Language of the Computer — 17 Stored Program Computers Instructions represented in binary, just like data Instructions and data stored in memory Programs can operate on programs – e.g., compilers, linkers, … Binary compatibility allows compiled programs to work on different computers – Standardized ISAs