Local Supports to IDR Discussion ATLAS Upgrade Week November 2014

Aim of Today To begin to discuss the programme of work needed to advance the development of Local Supports in readiness for the Technical Design Report (TDR) Starting point? - October IDR – See talks by Steve & Ingrid

Context: Roadmap to LS3

…. And in more detail…

Pre-Production Tasks Finalize engineering designs – Geometry, functional specifications, interfaces, etc… – Essentially we do have designs which (probably) meet all the requirements but we might not know this to be true! There are still many issues to be resolved! Qualify the designs – i.e. can we make the design reliably and how robust is it against part & manufacturing inaccuracies. Naturally needs us to develop QA/QC plans & develop suitable test infrastructure NB Post-irradiation verification of properties needs careful consideration (schedule, access to irradiated parts, etc…) Look at materials & part procurement – Materials specifications, market surveys, qualify vendors SJMcM: “The qualification phase of early procurement is essential & must be done on a timescale which does not impede production…”

October IDR - Ingrid

Ingrid’s Timescale to TDR

Managing Change What is fixed? – Is it agreed that there will be 5 barrel strip layers? – Is it agreed that they will all have 2 planes of sensors (axial/stereo) ? – Is the barrel tilt angle agreed? – Will there be a ‘stub’? – Plus anything else you care to think of! To my mind nothing is agreed! All we have are ‘working assumptions’. – Need to strike a balance between premature arbitrary decisions and paralysis through working in the dark. In any case it is 100% certain that we have to be able to manage change

What is the ‘Cost’ of Change? Small Change to Tilt angle For example a change at the degree level to optimise layout etc. Similar to recent re-design of locking point for wire- bonding clearances. Engineering design: 3months-eff ort (m-eff) - done Verification with prototypes: 2m-eff – prototypes to be made on 5-axis mill Re-manufacturing mold-tool: 2-3m-eff – not being done now Re-manufacturing stave insertion tooling: 2-3m-eff – not being done yet Castellated Staves Change to castellated design has a major impact on stave core design; Stave geometry (side EoS still possible? If not then might impact on EC geometry), stave assembly tooling, etc… Stave Mounting & insertion design, tooling & prototyping Cascading impact to areas outside LS assembly – global supports, services, etc… My crude guess is that this is a 36m-eff cost

Other Examples of Major Change ? 5 th ‘Pixel’ Layer – Removes need for stub(?) and maybe some stereo layers in barrel strip system (no direct impact on forward region?) Saves money (& effort) in production. Effort needed to re-optimise for fewer modules (bus tapes, lower power) & optimise layout (same side vs staggered modules) HVCMOS – Replace barrel strip sensors (unlikely in forward region?) IDR Reviewers: – “A clear three- years plan for R&D on the HV-CMOS integrated sensors was presented. This technology has potential cost benefits due to the availability of larger industrial production facilities both for the pixel and the strip detectors. The reviewers encourage the community to pursue these studies. “ Saves money (&effort in production) Effort needed to re-optimise for different module geometry (stave width, bus tapes, module mounting) and power. Optimisation of layout for specific module geometry proposed. Anything for the endcap?

A plan? Focus effort on addressing identified issues – Ingrid’s list – Identify key un-resolved specifications Push for early decisions where possible Understand scale of resources needed (effort and cash) to recover timeline should a major change occur Topic Geometry, radiation length, stability and tilt to be finalised Study of long-term deformations of staves/petals mounted onto realistic structure “mock-ups” Tooling for orbital welding to be defined (Integration rather than LS?) Optimal way to implement ceramic-titanium isolator Thermal modelling and prototyping of the end-of-stave/petal region to ensure design removes heat from the EoS card without impacting (too much) on the thermal runaway headroom Not enough production sites for cores -> end-cap no site proved yet to be able to produce the petals => work more closely with industry